From: Atish Patra Date: Wed, 3 Mar 2021 20:02:52 +0000 (-0800) Subject: RISC-V: Enable Microchip PolarFire ICICLE SoC X-Git-Tag: v5.15~1178^2~4 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2951162094e61f574b0ddf886c783ace65049450;p=platform%2Fkernel%2Flinux-starfive.git RISC-V: Enable Microchip PolarFire ICICLE SoC Enable Microchip PolarFire ICICLE soc config in defconfig. It allows the default upstream kernel to boot on PolarFire ICICLE board. Signed-off-by: Atish Patra Reviewed-by: Anup Patel Reviewed-by: Bin Meng Signed-off-by: Palmer Dabbelt --- diff --git a/arch/riscv/configs/defconfig b/arch/riscv/configs/defconfig index 6c0625a..1f2be23 100644 --- a/arch/riscv/configs/defconfig +++ b/arch/riscv/configs/defconfig @@ -16,6 +16,7 @@ CONFIG_EXPERT=y CONFIG_BPF_SYSCALL=y CONFIG_SOC_SIFIVE=y CONFIG_SOC_VIRT=y +CONFIG_SOC_MICROCHIP_POLARFIRE=y CONFIG_SMP=y CONFIG_HOTPLUG_CPU=y CONFIG_JUMP_LABEL=y @@ -82,6 +83,9 @@ CONFIG_USB_OHCI_HCD=y CONFIG_USB_OHCI_HCD_PLATFORM=y CONFIG_USB_STORAGE=y CONFIG_USB_UAS=y +CONFIG_MMC_SDHCI=y +CONFIG_MMC_SDHCI_PLTFM=y +CONFIG_MMC_SDHCI_CADENCE=y CONFIG_MMC=y CONFIG_MMC_SPI=y CONFIG_RTC_CLASS=y