From: Pratyush Yadav Date: Tue, 1 Dec 2020 10:27:11 +0000 (+0530) Subject: mtd: spi-nor: spansion: Set ECC block size X-Git-Tag: accepted/tizen/unified/20230118.172025~8250^2^2~7 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=294cca6ce5cf5b15ce4ebda4c266b4a849735c65;p=platform%2Fkernel%2Flinux-rpi.git mtd: spi-nor: spansion: Set ECC block size The S28 flash family uses 2-bit ECC by default with each ECC block being 16 bytes. Under this scheme multi-pass programming to an ECC block is not allowed. Set the writesize to make sure multi-pass programming is not attempted on the flash. Signed-off-by: Pratyush Yadav Signed-off-by: Vignesh Raghavendra Reviewed-by: Tudor Ambarus Link: https://lore.kernel.org/r/20201201102711.8727-4-p.yadav@ti.com --- diff --git a/drivers/mtd/spi-nor/spansion.c b/drivers/mtd/spi-nor/spansion.c index e487fd3..b0c5521 100644 --- a/drivers/mtd/spi-nor/spansion.c +++ b/drivers/mtd/spi-nor/spansion.c @@ -109,6 +109,7 @@ static int spi_nor_cypress_octal_dtr_enable(struct spi_nor *nor, bool enable) static void s28hs512t_default_init(struct spi_nor *nor) { nor->params->octal_dtr_enable = spi_nor_cypress_octal_dtr_enable; + nor->params->writesize = 16; } static void s28hs512t_post_sfdp_fixup(struct spi_nor *nor)