From: Pankit Garg Date: Wed, 29 May 2019 12:12:36 +0000 (+0000) Subject: armv8: fsl-layerscape: Update qspi clk cfg X-Git-Tag: v2019.07~26^2~14 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=293d75c0b1dc0678741841c639f52fa4875929a5;p=platform%2Fkernel%2Fu-boot.git armv8: fsl-layerscape: Update qspi clk cfg Update qspi clock configuration in TFABOOT in case of all boot sources except qspi boot source. Signed-off-by: Pankit Garg Reviewed-by: Prabhakar Kushwaha --- diff --git a/arch/arm/cpu/armv8/fsl-layerscape/soc.c b/arch/arm/cpu/armv8/fsl-layerscape/soc.c index af2d86b..c53131f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/soc.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/soc.c @@ -599,6 +599,9 @@ void fsl_lsch2_early_init_f(void) struct ccsr_cci400 *cci = (struct ccsr_cci400 *)(CONFIG_SYS_IMMR + CONFIG_SYS_CCI400_OFFSET); struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR; +#if defined(CONFIG_FSL_QSPI) && defined(CONFIG_TFABOOT) + enum boot_src src; +#endif #ifdef CONFIG_LAYERSCAPE_NS_ACCESS enable_layerscape_ns_access(); @@ -608,9 +611,15 @@ void fsl_lsch2_early_init_f(void) init_early_memctl_regs(); /* tighten IFC timing */ #endif +#if defined(CONFIG_FSL_QSPI) && defined(CONFIG_TFABOOT) + src = get_boot_src(); + if (src != BOOT_SOURCE_QSPI_NOR) + out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); +#else #if defined(CONFIG_FSL_QSPI) && !defined(CONFIG_QSPI_BOOT) out_be32(&scfg->qspi_cfg, SCFG_QSPI_CLKSEL); #endif +#endif /* Make SEC reads and writes snoopable */ setbits_be32(&scfg->snpcnfgcr, SCFG_SNPCNFGCR_SECRDSNP | SCFG_SNPCNFGCR_SECWRSNP |