From: Will Deacon <will.deacon@arm.com>
Date: Tue, 6 Oct 2015 17:46:29 +0000 (+0100)
Subject: arm64: tlb: remove redundant barrier from __flush_tlb_pgtable
X-Git-Tag: submit/tizen/20160607.132125~1388^2~92
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=28c6fbc3b446caf5f8d1f2d7b79e09e743158a4d;p=sdk%2Femulator%2Femulator-kernel.git

arm64: tlb: remove redundant barrier from __flush_tlb_pgtable

__flush_tlb_pgtable is used to invalidate intermediate page table
entries after they have been cleared and are about to be freed. Since
pXd_clear imply memory barriers, we don't need the extra one here.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
---

diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index 93e9f964805c..b460ae28e346 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -163,7 +163,6 @@ static inline void __flush_tlb_pgtable(struct mm_struct *mm,
 {
 	unsigned long addr = uaddr >> 12 | (ASID(mm) << 48);
 
-	dsb(ishst);
 	asm("tlbi	vae1is, %0" : : "r" (addr));
 	dsb(ish);
 }