From: Kukjin Kim <kgene.kim@samsung.com>
Date: Sat, 12 May 2012 07:45:47 +0000 (+0900)
Subject: ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1
X-Git-Tag: v3.4-rc7~1^2^2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=28b874a8ba7aed5152dc426dde38239ce23d8b37;p=profile%2Fivi%2Fkernel-adaptation-intel-automotive.git

ARM: EXYNOS: fix ctrlbit for exynos5_clk_pdma1

It should be (1 << 2) for ctrlbit of exynos5_clk_pdma1.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
---

diff --git a/arch/arm/mach-exynos/clock-exynos5.c b/arch/arm/mach-exynos/clock-exynos5.c
index 5cd7a8b..7ac6ff4 100644
--- a/arch/arm/mach-exynos/clock-exynos5.c
+++ b/arch/arm/mach-exynos/clock-exynos5.c
@@ -678,7 +678,7 @@ static struct clk exynos5_clk_pdma1 = {
 	.name		= "dma",
 	.devname	= "dma-pl330.1",
 	.enable		= exynos5_clk_ip_fsys_ctrl,
-	.ctrlbit	= (1 << 1),
+	.ctrlbit	= (1 << 2),
 };
 
 static struct clk exynos5_clk_mdma1 = {