From: Simon Pilgrim Date: Wed, 10 Jun 2020 15:38:33 +0000 (+0100) Subject: [X86][SSE] Cleanup tests based on feedback from D81547 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2843e7495b7b1a57c629e17c1a3866eba8fb3ff6;p=platform%2Fupstream%2Fllvm.git [X86][SSE] Cleanup tests based on feedback from D81547 Simplify tests to return i1 bool, removing superfluous function calls. Use nounwind to remove cfi --- diff --git a/llvm/test/CodeGen/X86/pr45378.ll b/llvm/test/CodeGen/X86/pr45378.ll index f6dcf28..b33d4c0 100644 --- a/llvm/test/CodeGen/X86/pr45378.ll +++ b/llvm/test/CodeGen/X86/pr45378.ll @@ -7,157 +7,75 @@ ; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=avx512bw | FileCheck %s --check-prefixes=CHECK,AVX,AVX512,AVX512BW declare i64 @llvm.experimental.vector.reduce.or.v2i64(<2 x i64>) -declare void @TrapFunc(i64) -define void @parseHeaders(i64 * %ptr) { -; SSE2-LABEL: parseHeaders: -; SSE2: # %bb.0: -; SSE2-NEXT: pushq %rax -; SSE2-NEXT: .cfi_def_cfa_offset 16 -; SSE2-NEXT: movdqu (%rdi), %xmm1 -; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm1[2,3,0,1] -; SSE2-NEXT: por %xmm0, %xmm1 -; SSE2-NEXT: movq %xmm1, %rax -; SSE2-NEXT: testq %rax, %rax -; SSE2-NEXT: je .LBB0_2 -; SSE2-NEXT: # %bb.1: # %trap -; SSE2-NEXT: movq %xmm0, %rdi -; SSE2-NEXT: callq TrapFunc -; SSE2-NEXT: .LBB0_2: # %ret -; SSE2-NEXT: popq %rax -; SSE2-NEXT: .cfi_def_cfa_offset 8 -; SSE2-NEXT: retq -; -; SSE41-LABEL: parseHeaders: -; SSE41: # %bb.0: -; SSE41-NEXT: pushq %rax -; SSE41-NEXT: .cfi_def_cfa_offset 16 -; SSE41-NEXT: movdqu (%rdi), %xmm0 -; SSE41-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] -; SSE41-NEXT: por %xmm0, %xmm1 -; SSE41-NEXT: movq %xmm1, %rax -; SSE41-NEXT: testq %rax, %rax -; SSE41-NEXT: je .LBB0_2 -; SSE41-NEXT: # %bb.1: # %trap -; SSE41-NEXT: pextrq $1, %xmm0, %rdi -; SSE41-NEXT: callq TrapFunc -; SSE41-NEXT: .LBB0_2: # %ret -; SSE41-NEXT: popq %rax -; SSE41-NEXT: .cfi_def_cfa_offset 8 -; SSE41-NEXT: retq +define i1 @parseHeaders(i64 * %ptr) nounwind { +; SSE-LABEL: parseHeaders: +; SSE: # %bb.0: +; SSE-NEXT: movdqu (%rdi), %xmm0 +; SSE-NEXT: pshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] +; SSE-NEXT: por %xmm0, %xmm1 +; SSE-NEXT: movq %xmm1, %rax +; SSE-NEXT: testq %rax, %rax +; SSE-NEXT: sete %al +; SSE-NEXT: retq ; ; AVX1-LABEL: parseHeaders: ; AVX1: # %bb.0: -; AVX1-NEXT: pushq %rax -; AVX1-NEXT: .cfi_def_cfa_offset 16 ; AVX1-NEXT: vmovdqu (%rdi), %xmm0 ; AVX1-NEXT: vpshufd {{.*#+}} xmm1 = xmm0[2,3,0,1] -; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm1 -; AVX1-NEXT: vmovq %xmm1, %rax +; AVX1-NEXT: vpor %xmm1, %xmm0, %xmm0 +; AVX1-NEXT: vmovq %xmm0, %rax ; AVX1-NEXT: testq %rax, %rax -; AVX1-NEXT: je .LBB0_2 -; AVX1-NEXT: # %bb.1: # %trap -; AVX1-NEXT: vpextrq $1, %xmm0, %rdi -; AVX1-NEXT: callq TrapFunc -; AVX1-NEXT: .LBB0_2: # %ret -; AVX1-NEXT: popq %rax -; AVX1-NEXT: .cfi_def_cfa_offset 8 +; AVX1-NEXT: sete %al ; AVX1-NEXT: retq ; ; AVX2-LABEL: parseHeaders: ; AVX2: # %bb.0: -; AVX2-NEXT: pushq %rax -; AVX2-NEXT: .cfi_def_cfa_offset 16 -; AVX2-NEXT: vmovdqu (%rdi), %xmm0 -; AVX2-NEXT: vpbroadcastq 8(%rdi), %xmm1 -; AVX2-NEXT: vpor %xmm1, %xmm0, %xmm1 -; AVX2-NEXT: vmovq %xmm1, %rax +; AVX2-NEXT: vpbroadcastq 8(%rdi), %xmm0 +; AVX2-NEXT: vpor (%rdi), %xmm0, %xmm0 +; AVX2-NEXT: vmovq %xmm0, %rax ; AVX2-NEXT: testq %rax, %rax -; AVX2-NEXT: je .LBB0_2 -; AVX2-NEXT: # %bb.1: # %trap -; AVX2-NEXT: vpextrq $1, %xmm0, %rdi -; AVX2-NEXT: callq TrapFunc -; AVX2-NEXT: .LBB0_2: # %ret -; AVX2-NEXT: popq %rax -; AVX2-NEXT: .cfi_def_cfa_offset 8 +; AVX2-NEXT: sete %al ; AVX2-NEXT: retq ; ; AVX512-LABEL: parseHeaders: ; AVX512: # %bb.0: -; AVX512-NEXT: pushq %rax -; AVX512-NEXT: .cfi_def_cfa_offset 16 -; AVX512-NEXT: vmovdqu (%rdi), %xmm0 -; AVX512-NEXT: vpbroadcastq 8(%rdi), %xmm1 -; AVX512-NEXT: vpor %xmm1, %xmm0, %xmm1 -; AVX512-NEXT: vmovq %xmm1, %rax +; AVX512-NEXT: vpbroadcastq 8(%rdi), %xmm0 +; AVX512-NEXT: vpor (%rdi), %xmm0, %xmm0 +; AVX512-NEXT: vmovq %xmm0, %rax ; AVX512-NEXT: testq %rax, %rax -; AVX512-NEXT: je .LBB0_2 -; AVX512-NEXT: # %bb.1: # %trap -; AVX512-NEXT: vpextrq $1, %xmm0, %rdi -; AVX512-NEXT: callq TrapFunc -; AVX512-NEXT: .LBB0_2: # %ret -; AVX512-NEXT: popq %rax -; AVX512-NEXT: .cfi_def_cfa_offset 8 +; AVX512-NEXT: sete %al ; AVX512-NEXT: retq %vptr = bitcast i64 * %ptr to <2 x i64> * %vload = load <2 x i64>, <2 x i64> * %vptr, align 8 %vreduce = call i64 @llvm.experimental.vector.reduce.or.v2i64(<2 x i64> %vload) %vcheck = icmp eq i64 %vreduce, 0 - br i1 %vcheck, label %ret, label %trap -trap: - %v2 = extractelement <2 x i64> %vload, i32 1 - call void @TrapFunc(i64 %v2) - ret void -ret: - ret void + ret i1 %vcheck } -define void @parseHeaders2_scalar_or(i64 * %ptr) { +define i1 @parseHeaders2_scalar_or(i64 * %ptr) nounwind { ; SSE2-LABEL: parseHeaders2_scalar_or: ; SSE2: # %bb.0: -; SSE2-NEXT: pushq %rax -; SSE2-NEXT: .cfi_def_cfa_offset 16 ; SSE2-NEXT: movdqu (%rdi), %xmm0 ; SSE2-NEXT: movq %xmm0, %rax ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] -; SSE2-NEXT: movq %xmm0, %rdi -; SSE2-NEXT: orq %rdi, %rax -; SSE2-NEXT: je .LBB1_2 -; SSE2-NEXT: # %bb.1: # %trap -; SSE2-NEXT: callq TrapFunc -; SSE2-NEXT: .LBB1_2: # %ret -; SSE2-NEXT: popq %rax -; SSE2-NEXT: .cfi_def_cfa_offset 8 +; SSE2-NEXT: movq %xmm0, %rcx +; SSE2-NEXT: orq %rax, %rcx +; SSE2-NEXT: sete %al ; SSE2-NEXT: retq ; ; SSE41-LABEL: parseHeaders2_scalar_or: ; SSE41: # %bb.0: -; SSE41-NEXT: pushq %rax -; SSE41-NEXT: .cfi_def_cfa_offset 16 ; SSE41-NEXT: movdqu (%rdi), %xmm0 ; SSE41-NEXT: ptest %xmm0, %xmm0 -; SSE41-NEXT: je .LBB1_2 -; SSE41-NEXT: # %bb.1: # %trap -; SSE41-NEXT: pextrq $1, %xmm0, %rdi -; SSE41-NEXT: callq TrapFunc -; SSE41-NEXT: .LBB1_2: # %ret -; SSE41-NEXT: popq %rax -; SSE41-NEXT: .cfi_def_cfa_offset 8 +; SSE41-NEXT: sete %al ; SSE41-NEXT: retq ; ; AVX-LABEL: parseHeaders2_scalar_or: ; AVX: # %bb.0: -; AVX-NEXT: pushq %rax -; AVX-NEXT: .cfi_def_cfa_offset 16 ; AVX-NEXT: vmovdqu (%rdi), %xmm0 ; AVX-NEXT: vptest %xmm0, %xmm0 -; AVX-NEXT: je .LBB1_2 -; AVX-NEXT: # %bb.1: # %trap -; AVX-NEXT: vpextrq $1, %xmm0, %rdi -; AVX-NEXT: callq TrapFunc -; AVX-NEXT: .LBB1_2: # %ret -; AVX-NEXT: popq %rax -; AVX-NEXT: .cfi_def_cfa_offset 8 +; AVX-NEXT: sete %al ; AVX-NEXT: retq %vptr = bitcast i64 * %ptr to <2 x i64> * %vload = load <2 x i64>, <2 x i64> * %vptr, align 8 @@ -165,62 +83,36 @@ define void @parseHeaders2_scalar_or(i64 * %ptr) { %v2 = extractelement <2 x i64> %vload, i32 1 %vreduce = or i64 %v1, %v2 %vcheck = icmp eq i64 %vreduce, 0 - br i1 %vcheck, label %ret, label %trap -trap: - call void @TrapFunc(i64 %v2) - ret void -ret: - ret void + ret i1 %vcheck } -define void @parseHeaders2_scalar_and(i64 * %ptr) { +define i1 @parseHeaders2_scalar_and(i64 * %ptr) nounwind { ; SSE2-LABEL: parseHeaders2_scalar_and: ; SSE2: # %bb.0: -; SSE2-NEXT: pushq %rax -; SSE2-NEXT: .cfi_def_cfa_offset 16 ; SSE2-NEXT: movdqu (%rdi), %xmm0 ; SSE2-NEXT: movq %xmm0, %rax ; SSE2-NEXT: pshufd {{.*#+}} xmm0 = xmm0[2,3,0,1] -; SSE2-NEXT: movq %xmm0, %rdi -; SSE2-NEXT: testq %rdi, %rax -; SSE2-NEXT: je .LBB2_2 -; SSE2-NEXT: # %bb.1: # %trap -; SSE2-NEXT: callq TrapFunc -; SSE2-NEXT: .LBB2_2: # %ret -; SSE2-NEXT: popq %rax -; SSE2-NEXT: .cfi_def_cfa_offset 8 +; SSE2-NEXT: movq %xmm0, %rcx +; SSE2-NEXT: testq %rcx, %rax +; SSE2-NEXT: sete %al ; SSE2-NEXT: retq ; ; SSE41-LABEL: parseHeaders2_scalar_and: ; SSE41: # %bb.0: -; SSE41-NEXT: pushq %rax -; SSE41-NEXT: .cfi_def_cfa_offset 16 ; SSE41-NEXT: movdqu (%rdi), %xmm0 ; SSE41-NEXT: movq %xmm0, %rax -; SSE41-NEXT: pextrq $1, %xmm0, %rdi -; SSE41-NEXT: testq %rdi, %rax -; SSE41-NEXT: je .LBB2_2 -; SSE41-NEXT: # %bb.1: # %trap -; SSE41-NEXT: callq TrapFunc -; SSE41-NEXT: .LBB2_2: # %ret -; SSE41-NEXT: popq %rax -; SSE41-NEXT: .cfi_def_cfa_offset 8 +; SSE41-NEXT: pextrq $1, %xmm0, %rcx +; SSE41-NEXT: testq %rcx, %rax +; SSE41-NEXT: sete %al ; SSE41-NEXT: retq ; ; AVX-LABEL: parseHeaders2_scalar_and: ; AVX: # %bb.0: -; AVX-NEXT: pushq %rax -; AVX-NEXT: .cfi_def_cfa_offset 16 ; AVX-NEXT: vmovdqu (%rdi), %xmm0 ; AVX-NEXT: vmovq %xmm0, %rax -; AVX-NEXT: vpextrq $1, %xmm0, %rdi -; AVX-NEXT: testq %rdi, %rax -; AVX-NEXT: je .LBB2_2 -; AVX-NEXT: # %bb.1: # %trap -; AVX-NEXT: callq TrapFunc -; AVX-NEXT: .LBB2_2: # %ret -; AVX-NEXT: popq %rax -; AVX-NEXT: .cfi_def_cfa_offset 8 +; AVX-NEXT: vpextrq $1, %xmm0, %rcx +; AVX-NEXT: testq %rcx, %rax +; AVX-NEXT: sete %al ; AVX-NEXT: retq %vptr = bitcast i64 * %ptr to <2 x i64> * %vload = load <2 x i64>, <2 x i64> * %vptr, align 8 @@ -228,10 +120,5 @@ define void @parseHeaders2_scalar_and(i64 * %ptr) { %v2 = extractelement <2 x i64> %vload, i32 1 %vreduce = and i64 %v1, %v2 %vcheck = icmp eq i64 %vreduce, 0 - br i1 %vcheck, label %ret, label %trap -trap: - call void @TrapFunc(i64 %v2) - ret void -ret: - ret void + ret i1 %vcheck }