From: Claudiu Zissulescu Date: Mon, 13 Mar 2017 12:55:50 +0000 (+0100) Subject: [ARC] Fix conditional move contstraint X-Git-Tag: upstream/12.2.0~40724 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=27ffcc3602e2c5f47130efcb6d4ca0df7a5ea587;p=platform%2Fupstream%2Fgcc.git [ARC] Fix conditional move contstraint Move pattern (movsi_insn) allows predicated instructions to be instructions which can hold all registers. However, the conditional variant doesn't. This patch fixes this problem. 2017-03-13 Claudiu Zissulescu * config/arc/arc.md (movsi_cond_exec): Update constraint. From-SVN: r246088 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f643504..6c6676e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,9 @@ 2017-03-13 Claudiu Zissulescu + * config/arc/arc.md (movsi_cond_exec): Update constraint. + +2017-03-13 Claudiu Zissulescu + * config/arc/arc.c (arc_legitimize_pic_address): Handle PIC expressions with MINUS and UNARY ops. diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md index 786febc..df039e6 100644 --- a/gcc/config/arc/arc.md +++ b/gcc/config/arc/arc.md @@ -3646,7 +3646,7 @@ (match_operator 3 "proper_comparison_operator" [(match_operand 2 "cc_register" "Rcc,Rcc") (const_int 0)]) (set (match_operand:SI 0 "dest_reg_operand" "=w,w") - (match_operand:SI 1 "nonmemory_operand" "Lc,?Cal")))] + (match_operand:SI 1 "nonmemory_operand" "LRac,?Cal")))] "" "mov.%d3 %0,%S1" [(set_attr "type" "cmove")