From: Ye.Li <ye.li@nxp.com>
Date: Sat, 8 Oct 2016 08:58:29 +0000 (+0800)
Subject: imx: mx6sx: Disable ENET clock before switching clock parent
X-Git-Tag: v2017.01-rc1~156^2~26
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=27e3a3c7f8a469c61509102a672d210bdff46059;p=platform%2Fkernel%2Fu-boot.git

imx: mx6sx: Disable ENET clock before switching clock parent

Need to gate ENET clock when switching to a new clock parent, because
the mux is not glitchless.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Ye.Li <ye.li@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
---

diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c
index ae3143c..96fbd81 100644
--- a/arch/arm/cpu/armv7/mx6/clock.c
+++ b/arch/arm/cpu/armv7/mx6/clock.c
@@ -881,6 +881,11 @@ int enable_fec_anatop_clock(int fec_id, enum enet_freq freq)
 	writel(reg, &anatop->pll_enet);
 
 #ifdef CONFIG_MX6SX
+	/* Disable enet system clcok before switching clock parent */
+	reg = readl(&imx_ccm->CCGR3);
+	reg &= ~MXC_CCM_CCGR3_ENET_MASK;
+	writel(reg, &imx_ccm->CCGR3);
+
 	/*
 	 * Set enet ahb clock to 200MHz
 	 * pll2_pfd2_396m-> ENET_PODF-> ENET_AHB