From: ktkachov Date: Mon, 24 Nov 2014 11:09:59 +0000 (+0000) Subject: [sched-deps] Remove needless check for modified_in_p when trying to fuse two non... X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=27c048b5925387237505a2a54546fde1197cda79;p=platform%2Fupstream%2Fgcc49.git [sched-deps] Remove needless check for modified_in_p when trying to fuse two non-conditional jump insns * sched-deps.c (sched_macro_fuse_insns): Do not check modified_in_p in the not conditional jump case. * doc/tm.texi (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description. * target.def (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description. * gcc.target/aarch64/fuse_adrp_add_1.c: New test. Change-Id: Iabca4d52f98a2eccc388be2398e441cb33bd4997 git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@218012 138bc75d-0d04-0410-961f-82ee72b054a4 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index c96484c..95ba9ad 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,12 @@ 2014-11-24 Kyrylo Tkachov + * sched-deps.c (sched_macro_fuse_insns): Do not check modified_in_p + in the not conditional jump case. + * doc/tm.texi (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description. + * target.def (TARGET_SCHED_MACRO_FUSION_PAIR_P): Update description. + +2014-11-24 Kyrylo Tkachov + * config/aarch64/aarch64.c: Include tm-constrs.h (AARCH64_FUSE_ADRP_ADD): Define. (cortexa57_tunings): Add AARCH64_FUSE_ADRP_ADD to fuseable_ops. diff --git a/gcc/doc/tm.texi b/gcc/doc/tm.texi index 9b07fbd..95e16e0 100644 --- a/gcc/doc/tm.texi +++ b/gcc/doc/tm.texi @@ -6586,11 +6586,13 @@ cycle. These other insns can then be taken into account properly. This hook is used to check whether target platform supports macro fusion. @end deftypefn -@deftypefn {Target Hook} bool TARGET_SCHED_MACRO_FUSION_PAIR_P (rtx @var{condgen}, rtx @var{condjmp}) -This hook is used to check whether two insns could be macro fused for -target microarchitecture. If this hook returns true for the given insn pair -(@var{condgen} and @var{condjmp}), scheduler will put them into a sched -group, and they will not be scheduled apart. +@deftypefn {Target Hook} bool TARGET_SCHED_MACRO_FUSION_PAIR_P (rtx @var{prev}, rtx @var{curr}) +This hook is used to check whether two insns should be macro fused for +a target microarchitecture. If this hook returns true for the given insn pair +(@var{prev} and @var{curr}), the scheduler will put them into a sched +group, and they will not be scheduled apart. The two insns will be either +two SET insns or a compare and a conditional jump and this hook should +validate any dependencies needed to fuse the two insns together. @end deftypefn @deftypefn {Target Hook} void TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK (rtx @var{head}, rtx @var{tail}) diff --git a/gcc/sched-deps.c b/gcc/sched-deps.c index b7e14e4..62bfcc7 100644 --- a/gcc/sched-deps.c +++ b/gcc/sched-deps.c @@ -2855,8 +2855,7 @@ sched_macro_fuse_insns (rtx insn) prev = prev_nonnote_nondebug_insn (insn); if (!prev || !insn_set - || !single_set (prev) - || !modified_in_p (SET_DEST (insn_set), prev)) + || !single_set (prev)) return; } diff --git a/gcc/target.def b/gcc/target.def index 6a65837..6b45908 100644 --- a/gcc/target.def +++ b/gcc/target.def @@ -1048,11 +1048,13 @@ DEFHOOK DEFHOOK (macro_fusion_pair_p, - "This hook is used to check whether two insns could be macro fused for\n\ -target microarchitecture. If this hook returns true for the given insn pair\n\ -(@var{condgen} and @var{condjmp}), scheduler will put them into a sched\n\ -group, and they will not be scheduled apart.", - bool, (rtx condgen, rtx condjmp), NULL) + "This hook is used to check whether two insns should be macro fused for\n\ +a target microarchitecture. If this hook returns true for the given insn pair\n\ +(@var{prev} and @var{curr}), the scheduler will put them into a sched\n\ +group, and they will not be scheduled apart. The two insns will be either\n\ +two SET insns or a compare and a conditional jump and this hook should\n\ +validate any dependencies needed to fuse the two insns together.", + bool, (rtx prev, rtx curr), NULL) /* The following member value is a pointer to a function called after evaluation forward dependencies of insns in chain given diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index c40cde8..aabae46 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2014-11-24 Kyrylo Tkachov + + * gcc.target/aarch64/fuse_adrp_add_1.c: New test. + 2014-11-14 Bin Cheng * gcc.target/arm/ldrd-strd-pair-1.c: New test. diff --git a/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c b/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c new file mode 100644 index 0000000..074c629 --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/fuse_adrp_add_1.c @@ -0,0 +1,45 @@ +/* { dg-do compile } */ +/* { dg-options "-O3 -mcpu=cortex-a57" } */ + +enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, + XGRF_REGS, ALL_REGS, LIM_REG_CLASSES }; + +enum rtx_code { REG, LAST_AND_UNUSED_RTX_CODE }; + +typedef union rtunion_def +{ + int rtint; +} rtunion; + +typedef struct rtx_def +{ + unsigned int volatil : 1; + rtunion fld[1]; +} *rtx; + +extern char fixed_regs[64]; +extern char global_regs[64]; + +int +rtx_cost (rtx x, int outer_code) +{ + register enum rtx_code code; + switch (code) + { + case REG: + return ! ((((x)->volatil) && ((x)->fld[0].rtint) < 64) + || ((((x)->fld[0].rtint)) == 30 || (((x)->fld[0].rtint)) == 30 + || (((x)->fld[0].rtint)) == 31 || (((x)->fld[0].rtint)) == 0 + || ((((x)->fld[0].rtint)) >= (64) + && (((x)->fld[0].rtint)) <= (((64)) + 3)) + || ((((x)->fld[0].rtint)) < 64 && ((((x)->fld[0].rtint)) == 30 + || (((x)->fld[0].rtint)) == 30 || fixed_regs[((x)->fld[0].rtint)] + || global_regs[((x)->fld[0].rtint)]) + && ((((x)->fld[0].rtint)) + ? ((((x)->fld[0].rtint) < 32) + ? GENERAL_REGS : XRF_REGS) + : AP_REG) != NO_REGS))); + } +} + +/* { dg-final { scan-assembler "adrp\tx.*, fixed_regs\n\tadd\tx.*, x.*fixed_regs" } } */