From: Peng Fan Date: Fri, 2 Sep 2022 11:12:07 +0000 (+0800) Subject: clocksource/drivers/imx-sysctr: handle nxp,no-divider property X-Git-Tag: v6.6.17~6427^2^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=27b30995b75d1e79360c164ba179bca86ab76ba6;p=platform%2Fkernel%2Flinux-rpi.git clocksource/drivers/imx-sysctr: handle nxp,no-divider property The previous hardware design embedds a internal divider for base clock. New design not has that divider, so check the nxp,no-divider property, if true, directly use base clock input, otherwise divide by 3 as before. Signed-off-by: Peng Fan Link: https://lore.kernel.org/r/20220902111207.2902493-3-peng.fan@oss.nxp.com Signed-off-by: Daniel Lezcano --- diff --git a/drivers/clocksource/timer-imx-sysctr.c b/drivers/clocksource/timer-imx-sysctr.c index 523e376..5a7a951 100644 --- a/drivers/clocksource/timer-imx-sysctr.c +++ b/drivers/clocksource/timer-imx-sysctr.c @@ -134,8 +134,10 @@ static int __init sysctr_timer_init(struct device_node *np) if (ret) return ret; - /* system counter clock is divided by 3 internally */ - to_sysctr.of_clk.rate /= SYS_CTR_CLK_DIV; + if (!of_property_read_bool(np, "nxp,no-divider")) { + /* system counter clock is divided by 3 internally */ + to_sysctr.of_clk.rate /= SYS_CTR_CLK_DIV; + } sys_ctr_base = timer_of_base(&to_sysctr); cmpcr = readl(sys_ctr_base + CMPCR);