From: Maciej W. Rozycki Date: Mon, 24 Oct 2011 14:21:41 +0000 (+0000) Subject: * mips.h: Fix a typo in description. X-Git-Tag: sid-snapshot-20111101~79 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=26f85d7a30c095103c3f7a3b4d28ebfb5d490df1;p=platform%2Fupstream%2Fbinutils.git * mips.h: Fix a typo in description. --- diff --git a/include/opcode/ChangeLog b/include/opcode/ChangeLog index 8f070a1..b0125ed 100644 --- a/include/opcode/ChangeLog +++ b/include/opcode/ChangeLog @@ -1,3 +1,7 @@ +2011-10-24 Maciej W. Rozycki + + * mips.h: Fix a typo in description. + 2011-09-21 David S. Miller * sparc.h (struct sparc_opcode): Expand 'flags' to unsigned int. diff --git a/include/opcode/mips.h b/include/opcode/mips.h index e6703f8..a94860f 100644 --- a/include/opcode/mips.h +++ b/include/opcode/mips.h @@ -1616,7 +1616,7 @@ extern const int bfd_mips16_num_opcodes; "c" 10-bit higher breakpoint code (MICROMIPSOP_*_CODE) "d" 5-bit destination register specifier (MICROMIPSOP_*_RD) "h" 5-bit PREFX hint (MICROMIPSOP_*_PREFX) - "i" 16 bit unsigned immediate (MICROMIPSOP_*_IMMEDIATE) + "i" 16-bit unsigned immediate (MICROMIPSOP_*_IMMEDIATE) "j" 16-bit signed immediate (MICROMIPSOP_*_DELTA) "k" 5-bit cache opcode in target register position (MICROMIPSOP_*_CACHE) "n" register list for 32-bit LWM/SWM instruction (MICROMIPSOP_*_RT)