From: Marek Olšák Date: Sun, 23 Oct 2016 19:28:29 +0000 (+0200) Subject: gallium/radeon: re-order radeon_surf::dcc and htile members X-Git-Tag: upstream/17.1.0~5182 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2664351dfeeba2c1d0de272cdf6d5fd940a367e9;p=platform%2Fupstream%2Fmesa.git gallium/radeon: re-order radeon_surf::dcc and htile members Reviewed-by: Nicolai Hähnle --- diff --git a/src/gallium/drivers/radeon/radeon_winsys.h b/src/gallium/drivers/radeon/radeon_winsys.h index cec1274..2330cdd 100644 --- a/src/gallium/drivers/radeon/radeon_winsys.h +++ b/src/gallium/drivers/radeon/radeon_winsys.h @@ -298,7 +298,12 @@ struct radeon_surf { * changed by the calculator. */ uint64_t surf_size; + uint64_t dcc_size; + uint64_t htile_size; + uint32_t surf_alignment; + uint32_t dcc_alignment; + uint32_t htile_alignment; /* This applies to EG and later. */ unsigned bankw:4; /* max 8 */ @@ -323,11 +328,6 @@ struct radeon_surf { struct radeon_surf_level stencil_level[RADEON_SURF_MAX_LEVELS]; uint8_t tiling_index[RADEON_SURF_MAX_LEVELS]; uint8_t stencil_tiling_index[RADEON_SURF_MAX_LEVELS]; - - uint64_t dcc_size; - uint32_t dcc_alignment; - uint64_t htile_size; - uint32_t htile_alignment; }; struct radeon_bo_list_item {