From: Marek Olšák <marek.olsak@amd.com>
Date: Thu, 10 Sep 2015 16:27:53 +0000 (+0200)
Subject: radeonsi: skip drawing if GS ring allocations fail
X-Git-Tag: upstream/17.1.0~15899
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=263f5a2cf97e455e48dbd7728cb0ac10fd699746;p=platform%2Fupstream%2Fmesa.git

radeonsi: skip drawing if GS ring allocations fail

Cc: 11.0 <mesa-stable@lists.freedesktop.org>
Acked-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Michel Dänzer <michel.daenzer@amd.com>
---

diff --git a/src/gallium/drivers/radeonsi/si_state_shaders.c b/src/gallium/drivers/radeonsi/si_state_shaders.c
index 11b58e8..bc7fdb3 100644
--- a/src/gallium/drivers/radeonsi/si_state_shaders.c
+++ b/src/gallium/drivers/radeonsi/si_state_shaders.c
@@ -1069,9 +1069,15 @@ static void si_init_gs_rings(struct si_context *sctx)
 
 	sctx->esgs_ring = pipe_buffer_create(sctx->b.b.screen, PIPE_BIND_CUSTOM,
 				       PIPE_USAGE_DEFAULT, esgs_ring_size);
+	if (!sctx->esgs_ring)
+		return;
 
 	sctx->gsvs_ring = pipe_buffer_create(sctx->b.b.screen, PIPE_BIND_CUSTOM,
 					     PIPE_USAGE_DEFAULT, gsvs_ring_size);
+	if (!sctx->gsvs_ring) {
+		pipe_resource_reference(&sctx->esgs_ring, NULL);
+		return;
+	}
 
 	/* Append these registers to the init config state. */
 	if (sctx->b.chip_class >= CIK) {
@@ -1443,8 +1449,11 @@ bool si_update_shaders(struct si_context *sctx)
 		si_pm4_bind_state(sctx, vs, sctx->gs_shader->current->gs_copy_shader->pm4);
 		si_update_so(sctx, sctx->gs_shader);
 
-		if (!sctx->gsvs_ring)
+		if (!sctx->gsvs_ring) {
 			si_init_gs_rings(sctx);
+			if (!sctx->gsvs_ring)
+				return false;
+		}
 
 		si_update_gs_rings(sctx);
 	} else {