From: Noah Goldstein Date: Tue, 16 May 2023 15:41:51 +0000 (-0500) Subject: [ValueTracking] Add tests for knownbits of `abs`; NFC X-Git-Tag: upstream/17.0.6~8233 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=261e5d0951ef15fea4db96f3c9c6080af9548239;p=platform%2Fupstream%2Fllvm.git [ValueTracking] Add tests for knownbits of `abs`; NFC Reviewed By: RKSimon Differential Revision: https://reviews.llvm.org/D150099 --- diff --git a/llvm/test/Analysis/ValueTracking/knownbits-abs.ll b/llvm/test/Analysis/ValueTracking/knownbits-abs.ll new file mode 100644 index 0000000..e3c1d2c --- /dev/null +++ b/llvm/test/Analysis/ValueTracking/knownbits-abs.ll @@ -0,0 +1,82 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -passes=instsimplify -S < %s | FileCheck %s +declare i8 @llvm.abs.i8(i8, i1) + +define i1 @abs_low_bit_set(i8 %x) { +; CHECK-LABEL: @abs_low_bit_set( +; CHECK-NEXT: [[XX:%.*]] = and i8 [[X:%.*]], -16 +; CHECK-NEXT: [[V:%.*]] = or i8 [[XX]], 4 +; CHECK-NEXT: [[ABS:%.*]] = call i8 @llvm.abs.i8(i8 [[V]], i1 true) +; CHECK-NEXT: [[AND:%.*]] = and i8 [[ABS]], 4 +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], 0 +; CHECK-NEXT: ret i1 [[R]] +; + %xx = and i8 %x, 240 + %v = or i8 %xx, 4 + %abs = call i8 @llvm.abs.i8(i8 %v, i1 true) + %and = and i8 %abs, 4 + %r = icmp eq i8 %and, 0 + ret i1 %r +} + +define i1 @abs_unknown_low_bit_set_fail(i8 %x) { +; CHECK-LABEL: @abs_unknown_low_bit_set_fail( +; CHECK-NEXT: [[V:%.*]] = or i8 [[X:%.*]], 2 +; CHECK-NEXT: [[ABS:%.*]] = call i8 @llvm.abs.i8(i8 [[V]], i1 true) +; CHECK-NEXT: [[AND:%.*]] = and i8 [[ABS]], 2 +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], 0 +; CHECK-NEXT: ret i1 [[R]] +; + %v = or i8 %x, 2 + %abs = call i8 @llvm.abs.i8(i8 %v, i1 true) + %and = and i8 %abs, 2 + %r = icmp eq i8 %and, 0 + ret i1 %r +} + +define i1 @abs_negative(i8 %x) { +; CHECK-LABEL: @abs_negative( +; CHECK-NEXT: [[XX:%.*]] = and i8 [[X:%.*]], -16 +; CHECK-NEXT: [[V:%.*]] = or i8 [[XX]], -124 +; CHECK-NEXT: [[ABS:%.*]] = call i8 @llvm.abs.i8(i8 [[V]], i1 true) +; CHECK-NEXT: [[AND:%.*]] = and i8 [[ABS]], 8 +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], 0 +; CHECK-NEXT: ret i1 [[R]] +; + %xx = and i8 %x, 240 + %v = or i8 %xx, 132 + %abs = call i8 @llvm.abs.i8(i8 %v, i1 true) + %and = and i8 %abs, 8 + %r = icmp eq i8 %and, 0 + ret i1 %r +} + +define i1 @abs_negative2(i8 %x) { +; CHECK-LABEL: @abs_negative2( +; CHECK-NEXT: [[V:%.*]] = or i8 [[X:%.*]], -125 +; CHECK-NEXT: [[ABS:%.*]] = call i8 @llvm.abs.i8(i8 [[V]], i1 true) +; CHECK-NEXT: [[AND:%.*]] = and i8 [[ABS]], 2 +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], 2 +; CHECK-NEXT: ret i1 [[R]] +; + %v = or i8 %x, 131 + %abs = call i8 @llvm.abs.i8(i8 %v, i1 true) + %and = and i8 %abs, 2 + %r = icmp eq i8 %and, 2 + ret i1 %r +} + +define i1 @abs_negative_no_carry_info_fail(i8 %x) { +; CHECK-LABEL: @abs_negative_no_carry_info_fail( +; CHECK-NEXT: [[V:%.*]] = or i8 [[X:%.*]], -126 +; CHECK-NEXT: [[ABS:%.*]] = call i8 @llvm.abs.i8(i8 [[V]], i1 true) +; CHECK-NEXT: [[AND:%.*]] = and i8 [[ABS]], 2 +; CHECK-NEXT: [[R:%.*]] = icmp eq i8 [[AND]], 0 +; CHECK-NEXT: ret i1 [[R]] +; + %v = or i8 %x, 130 + %abs = call i8 @llvm.abs.i8(i8 %v, i1 true) + %and = and i8 %abs, 2 + %r = icmp eq i8 %and, 0 + ret i1 %r +}