From: Jacob Pan Date: Tue, 17 Mar 2020 01:10:18 +0000 (+0800) Subject: iommu/vt-d: Fix page request descriptor size X-Git-Tag: v5.4.35~27 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=24191c8c9bd2770e106dea524707f640a2053228;p=platform%2Fkernel%2Flinux-rpi.git iommu/vt-d: Fix page request descriptor size [ Upstream commit 52355fb1919ef7ed9a38e0f3de6e928de1f57217 ] Intel VT-d might support PRS (Page Reqest Support) when it's running in the scalable mode. Each page request descriptor occupies 32 bytes and is 32-bytes aligned. The page request descriptor offset mask should be 32-bytes aligned. Fixes: 5b438f4ba315d ("iommu/vt-d: Support page request in scalable mode") Signed-off-by: Lu Baolu Signed-off-by: Liu Yi L Signed-off-by: Jacob Pan Signed-off-by: Joerg Roedel Signed-off-by: Sasha Levin --- diff --git a/drivers/iommu/intel-svm.c b/drivers/iommu/intel-svm.c index 3020506..1d3816c 100644 --- a/drivers/iommu/intel-svm.c +++ b/drivers/iommu/intel-svm.c @@ -502,7 +502,7 @@ struct page_req_dsc { u64 priv_data[2]; }; -#define PRQ_RING_MASK ((0x1000 << PRQ_ORDER) - 0x10) +#define PRQ_RING_MASK ((0x1000 << PRQ_ORDER) - 0x20) static bool access_error(struct vm_area_struct *vma, struct page_req_dsc *req) {