From: shaoyunl Date: Tue, 1 Jun 2021 14:50:14 +0000 (-0400) Subject: drm/amdgpu: soc15 register access through RLC should only apply to sriov runtime X-Git-Tag: accepted/tizen/unified/20230118.172025~6864^2~15^2~170 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=23e4aa5179bcfbe322904137c2cbbac9f7aeaacc;p=platform%2Fkernel%2Flinux-rpi.git drm/amdgpu: soc15 register access through RLC should only apply to sriov runtime On SRIOV, driver should only access register through RLC in runtime Acked-by: Alex Deucher Signed-off-by: shaoyunl Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/amdgpu/soc15_common.h b/drivers/gpu/drm/amd/amdgpu/soc15_common.h index c781808..f6cf70e 100644 --- a/drivers/gpu/drm/amd/amdgpu/soc15_common.h +++ b/drivers/gpu/drm/amd/amdgpu/soc15_common.h @@ -28,12 +28,12 @@ #define SOC15_REG_OFFSET(ip, inst, reg) (adev->reg_offset[ip##_HWIP][inst][reg##_BASE_IDX] + reg) #define __WREG32_SOC15_RLC__(reg, value, flag, hwip) \ - ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs->rlcg_wreg) ? \ + ((amdgpu_sriov_runtime(adev) && adev->gfx.rlc.funcs->rlcg_wreg) ? \ adev->gfx.rlc.funcs->rlcg_wreg(adev, reg, value, flag, hwip) : \ WREG32(reg, value)) #define __RREG32_SOC15_RLC__(reg, flag, hwip) \ - ((amdgpu_sriov_vf(adev) && adev->gfx.rlc.funcs->rlcg_rreg) ? \ + ((amdgpu_sriov_runtime(adev) && adev->gfx.rlc.funcs->rlcg_rreg) ? \ adev->gfx.rlc.funcs->rlcg_rreg(adev, reg, flag, hwip) : \ RREG32(reg))