From: Jonathan Cameron Date: Sun, 8 May 2022 17:56:12 +0000 (+0100) Subject: iio: adc: ti-adc128s052: Fix alignment for DMA safety X-Git-Tag: v6.6.17~6911^2~26^2~121 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=23c81e7a7e5204a08b553d07362d3082926663b8;p=platform%2Fkernel%2Flinux-rpi.git iio: adc: ti-adc128s052: Fix alignment for DMA safety ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Fixes: 913b86468674 ("iio: adc: Add TI ADC128S052") Signed-off-by: Jonathan Cameron Acked-by: Nuno Sá Link: https://lore.kernel.org/r/20220508175712.647246-33-jic23@kernel.org --- diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c index 8e7adec..622fd38 100644 --- a/drivers/iio/adc/ti-adc128s052.c +++ b/drivers/iio/adc/ti-adc128s052.c @@ -29,7 +29,7 @@ struct adc128 { struct regulator *reg; struct mutex lock; - u8 buffer[2] ____cacheline_aligned; + u8 buffer[2] __aligned(IIO_DMA_MINALIGN); }; static int adc128_adc_conversion(struct adc128 *adc, u8 channel)