From: Linus Torvalds <torvalds@linux-foundation.org>
Date: Fri, 9 Sep 2022 18:06:10 +0000 (-0400)
Subject: Merge tag 'riscv-for-linus-6.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel... 
X-Git-Tag: v6.6.17~6645
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=22b2e2d6ab35fdef4439e27da2df208014d52eda;p=platform%2Fkernel%2Flinux-rpi.git

Merge tag 'riscv-for-linus-6.0-rc5' of git://git./linux/kernel/git/riscv/linux

Pull RISC-V fixes from Palmer Dabbelt:

 - A pair of device tree fixes for the Polarfire SOC

 - A fix to avoid overflowing the PMU counter array when firmware
   incorrectly reports the number of supported counters, which manifests
   on OpenSBI versions prior to 1.1

* tag 'riscv-for-linus-6.0-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
  perf: RISC-V: fix access beyond allocated array
  riscv: dts: microchip: use an mpfs specific l2 compatible
  dt-bindings: riscv: sifive-l2: add a PolarFire SoC compatible
---

22b2e2d6ab35fdef4439e27da2df208014d52eda