From: Simon Pilgrim <llvm-dev@redking.me.uk>
Date: Thu, 13 Feb 2020 13:53:45 +0000 (+0000)
Subject: [X86][SSE] Add i686-SSE2 bswap vector tests
X-Git-Tag: llvmorg-12-init~14804
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=22430c9d6c4c51a3b5cbe606c7f1c5779857e6d3;p=platform%2Fupstream%2Fllvm.git

[X86][SSE] Add i686-SSE2 bswap vector tests
---

diff --git a/llvm/test/CodeGen/X86/bswap-vector.ll b/llvm/test/CodeGen/X86/bswap-vector.ll
index 4bb2b76..222e0d7 100644
--- a/llvm/test/CodeGen/X86/bswap-vector.ll
+++ b/llvm/test/CodeGen/X86/bswap-vector.ll
@@ -1,7 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefix=CHECK-ALL --check-prefix=CHECK-SSE --check-prefix=CHECK-NOSSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s --check-prefix=CHECK-ALL --check-prefix=CHECK-SSE --check-prefix=CHECK-SSSE3
-; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefix=CHECK-ALL --check-prefix=CHECK-AVX --check-prefix=CHECK-AVX2
+; RUN: llc < %s -mtriple=i686-unknown-linux-gnu -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-NOSSSE3,CHECK-SSE-X86,CHECK-NOSSSE3-X86
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-SSE-X64,CHECK-NOSSSE3,CHECK-NOSSSE3-X64
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-SSE,CHECK-SSE-X64,CHECK-SSSE3
+; RUN: llc < %s -mtriple=x86_64-unknown-linux-gnu -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK-ALL,CHECK-AVX,CHECK-AVX2
 
 declare <8 x i16> @llvm.bswap.v8i16(<8 x i16>)
 declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>)
@@ -19,7 +20,7 @@ define <8 x i16> @test1(<8 x i16> %v) {
 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7]
 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6]
 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm2, %xmm0
-; CHECK-NOSSSE3-NEXT:    retq
+; CHECK-NOSSSE3-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-SSSE3-LABEL: test1:
 ; CHECK-SSSE3:       # %bb.0: # %entry
@@ -47,7 +48,7 @@ define <4 x i32> @test2(<4 x i32> %v) {
 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm2, %xmm0
-; CHECK-NOSSSE3-NEXT:    retq
+; CHECK-NOSSSE3-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-SSSE3-LABEL: test2:
 ; CHECK-SSSE3:       # %bb.0:
@@ -75,7 +76,7 @@ define <4 x i32> @or_bswap(<4 x i32> %x, <4 x i32> %y, <4 x i32>* %p1, <4 x i32>
 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm2, %xmm0
-; CHECK-NOSSSE3-NEXT:    retq
+; CHECK-NOSSSE3-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-SSSE3-LABEL: or_bswap:
 ; CHECK-SSSE3:       # %bb.0:
@@ -108,7 +109,7 @@ define <2 x i64> @test3(<2 x i64> %v) {
 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[3,2,1,0,4,5,6,7]
 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,7,6,5,4]
 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm2, %xmm0
-; CHECK-NOSSSE3-NEXT:    retq
+; CHECK-NOSSSE3-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-SSSE3-LABEL: test3:
 ; CHECK-SSSE3:       # %bb.0: # %entry
@@ -148,7 +149,7 @@ define <16 x i16> @test4(<16 x i16> %v) {
 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[1,0,3,2,4,5,6,7]
 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,5,4,7,6]
 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm3, %xmm1
-; CHECK-NOSSSE3-NEXT:    retq
+; CHECK-NOSSSE3-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-SSSE3-LABEL: test4:
 ; CHECK-SSSE3:       # %bb.0: # %entry
@@ -186,7 +187,7 @@ define <8 x i32> @test5(<8 x i32> %v) {
 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[3,2,1,0,4,5,6,7]
 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,7,6,5,4]
 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm3, %xmm1
-; CHECK-NOSSSE3-NEXT:    retq
+; CHECK-NOSSSE3-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-SSSE3-LABEL: test5:
 ; CHECK-SSSE3:       # %bb.0: # %entry
@@ -228,7 +229,7 @@ define <4 x i64> @test6(<4 x i64> %v) {
 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm1 = xmm1[3,2,1,0,4,5,6,7]
 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm1 = xmm1[0,1,2,3,7,6,5,4]
 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm3, %xmm1
-; CHECK-NOSSSE3-NEXT:    retq
+; CHECK-NOSSSE3-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-SSSE3-LABEL: test6:
 ; CHECK-SSSE3:       # %bb.0: # %entry
@@ -260,7 +261,7 @@ define <4 x i16> @test7(<4 x i16> %v) {
 ; CHECK-NOSSSE3-NEXT:    pshuflw {{.*#+}} xmm0 = xmm0[1,0,3,2,4,5,6,7]
 ; CHECK-NOSSSE3-NEXT:    pshufhw {{.*#+}} xmm0 = xmm0[0,1,2,3,5,4,7,6]
 ; CHECK-NOSSSE3-NEXT:    packuswb %xmm2, %xmm0
-; CHECK-NOSSSE3-NEXT:    retq
+; CHECK-NOSSSE3-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-SSSE3-LABEL: test7:
 ; CHECK-SSSE3:       # %bb.0: # %entry
@@ -283,7 +284,7 @@ entry:
 define <8 x i16> @identity_v8i16(<8 x i16> %v) {
 ; CHECK-ALL-LABEL: identity_v8i16:
 ; CHECK-ALL:       # %bb.0: # %entry
-; CHECK-ALL-NEXT:    retq
+; CHECK-ALL-NEXT:    ret{{[l|q]}}
 entry:
   %bs1 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %v)
   %bs2 = call <8 x i16> @llvm.bswap.v8i16(<8 x i16> %bs1)
@@ -293,7 +294,7 @@ entry:
 define <4 x i32> @identity_v4i32(<4 x i32> %v) {
 ; CHECK-ALL-LABEL: identity_v4i32:
 ; CHECK-ALL:       # %bb.0: # %entry
-; CHECK-ALL-NEXT:    retq
+; CHECK-ALL-NEXT:    ret{{[l|q]}}
 entry:
   %bs1 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %v)
   %bs2 = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %bs1)
@@ -303,7 +304,7 @@ entry:
 define <2 x i64> @identity_v2i64(<2 x i64> %v) {
 ; CHECK-ALL-LABEL: identity_v2i64:
 ; CHECK-ALL:       # %bb.0: # %entry
-; CHECK-ALL-NEXT:    retq
+; CHECK-ALL-NEXT:    ret{{[l|q]}}
 entry:
   %bs1 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %v)
   %bs2 = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %bs1)
@@ -313,7 +314,7 @@ entry:
 define <16 x i16> @identity_v16i16(<16 x i16> %v) {
 ; CHECK-ALL-LABEL: identity_v16i16:
 ; CHECK-ALL:       # %bb.0: # %entry
-; CHECK-ALL-NEXT:    retq
+; CHECK-ALL-NEXT:    ret{{[l|q]}}
 entry:
   %bs1 = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %v)
   %bs2 = call <16 x i16> @llvm.bswap.v16i16(<16 x i16> %bs1)
@@ -323,7 +324,7 @@ entry:
 define <8 x i32> @identity_v8i32(<8 x i32> %v) {
 ; CHECK-ALL-LABEL: identity_v8i32:
 ; CHECK-ALL:       # %bb.0: # %entry
-; CHECK-ALL-NEXT:    retq
+; CHECK-ALL-NEXT:    ret{{[l|q]}}
 entry:
   %bs1 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %v)
   %bs2 = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %bs1)
@@ -333,7 +334,7 @@ entry:
 define <4 x i64> @identity_v4i64(<4 x i64> %v) {
 ; CHECK-ALL-LABEL: identity_v4i64:
 ; CHECK-ALL:       # %bb.0: # %entry
-; CHECK-ALL-NEXT:    retq
+; CHECK-ALL-NEXT:    ret{{[l|q]}}
 entry:
   %bs1 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %v)
   %bs2 = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %bs1)
@@ -343,7 +344,7 @@ entry:
 define <4 x i16> @identity_v4i16(<4 x i16> %v) {
 ; CHECK-ALL-LABEL: identity_v4i16:
 ; CHECK-ALL:       # %bb.0: # %entry
-; CHECK-ALL-NEXT:    retq
+; CHECK-ALL-NEXT:    ret{{[l|q]}}
 entry:
   %bs1 = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %v)
   %bs2 = call <4 x i16> @llvm.bswap.v4i16(<4 x i16> %bs1)
@@ -358,7 +359,7 @@ define <8 x i16> @fold_v8i16() {
 ; CHECK-SSE-LABEL: fold_v8i16:
 ; CHECK-SSE:       # %bb.0: # %entry
 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536]
-; CHECK-SSE-NEXT:    retq
+; CHECK-SSE-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-AVX-LABEL: fold_v8i16:
 ; CHECK-AVX:       # %bb.0: # %entry
@@ -373,7 +374,7 @@ define <4 x i32> @fold_v4i32() {
 ; CHECK-SSE-LABEL: fold_v4i32:
 ; CHECK-SSE:       # %bb.0: # %entry
 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [0,4294967295,33554432,4261412863]
-; CHECK-SSE-NEXT:    retq
+; CHECK-SSE-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-AVX-LABEL: fold_v4i32:
 ; CHECK-AVX:       # %bb.0: # %entry
@@ -385,10 +386,15 @@ entry:
 }
 
 define <2 x i64> @fold_v2i64() {
-; CHECK-SSE-LABEL: fold_v2i64:
-; CHECK-SSE:       # %bb.0: # %entry
-; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
-; CHECK-SSE-NEXT:    retq
+; CHECK-SSE-X86-LABEL: fold_v2i64:
+; CHECK-SSE-X86:       # %bb.0: # %entry
+; CHECK-SSE-X86-NEXT:    movaps {{.*#+}} xmm0 = [0,4278190080,4294967295,4294967295]
+; CHECK-SSE-X86-NEXT:    retl
+;
+; CHECK-SSE-X64-LABEL: fold_v2i64:
+; CHECK-SSE-X64:       # %bb.0: # %entry
+; CHECK-SSE-X64-NEXT:    movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
+; CHECK-SSE-X64-NEXT:    retq
 ;
 ; CHECK-AVX-LABEL: fold_v2i64:
 ; CHECK-AVX:       # %bb.0: # %entry
@@ -404,7 +410,7 @@ define <16 x i16> @fold_v16i16() {
 ; CHECK-SSE:       # %bb.0: # %entry
 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [0,256,65535,512,65023,1024,64511,1536]
 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm1 = [63999,2048,63487,2560,62975,3072,62463,3584]
-; CHECK-SSE-NEXT:    retq
+; CHECK-SSE-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-AVX-LABEL: fold_v16i16:
 ; CHECK-AVX:       # %bb.0: # %entry
@@ -420,7 +426,7 @@ define <8 x i32> @fold_v8i32() {
 ; CHECK-SSE:       # %bb.0: # %entry
 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [0,16777216,4294967295,33554432]
 ; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm1 = [4261412863,67108864,4227858431,100663296]
-; CHECK-SSE-NEXT:    retq
+; CHECK-SSE-NEXT:    ret{{[l|q]}}
 ;
 ; CHECK-AVX-LABEL: fold_v8i32:
 ; CHECK-AVX:       # %bb.0: # %entry
@@ -432,11 +438,17 @@ entry:
 }
 
 define <4 x i64> @fold_v4i64() {
-; CHECK-SSE-LABEL: fold_v4i64:
-; CHECK-SSE:       # %bb.0: # %entry
-; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
-; CHECK-SSE-NEXT:    movaps {{.*#+}} xmm1 = [18446462598732840960,72056494526300160]
-; CHECK-SSE-NEXT:    retq
+; CHECK-SSE-X86-LABEL: fold_v4i64:
+; CHECK-SSE-X86:       # %bb.0: # %entry
+; CHECK-SSE-X86-NEXT:    movaps {{.*#+}} xmm0 = [0,4278190080,4294967295,4294967295]
+; CHECK-SSE-X86-NEXT:    movaps {{.*#+}} xmm1 = [0,4294901760,0,16776960]
+; CHECK-SSE-X86-NEXT:    retl
+;
+; CHECK-SSE-X64-LABEL: fold_v4i64:
+; CHECK-SSE-X64:       # %bb.0: # %entry
+; CHECK-SSE-X64-NEXT:    movaps {{.*#+}} xmm0 = [18374686479671623680,18446744073709551615]
+; CHECK-SSE-X64-NEXT:    movaps {{.*#+}} xmm1 = [18446462598732840960,72056494526300160]
+; CHECK-SSE-X64-NEXT:    retq
 ;
 ; CHECK-AVX-LABEL: fold_v4i64:
 ; CHECK-AVX:       # %bb.0: # %entry