From: Amir Ayupov Date: Mon, 6 Feb 2023 22:03:40 +0000 (-0800) Subject: [BOLT][NFC] Return instruction list from createInstrIncMemory X-Git-Tag: upstream/17.0.6~14984 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=223ec28da44fe673c3318deffc27f08733bcd7d1;p=platform%2Fupstream%2Fllvm.git [BOLT][NFC] Return instruction list from createInstrIncMemory Leverage move semantics for `std::vector`. This also makes it consistent with `createInstrumentationSnippet`. Reviewed By: Elvina Differential Revision: https://reviews.llvm.org/D145465 --- diff --git a/bolt/include/bolt/Core/MCPlusBuilder.h b/bolt/include/bolt/Core/MCPlusBuilder.h index dfb593e794fc..fb408bbbecc8 100644 --- a/bolt/include/bolt/Core/MCPlusBuilder.h +++ b/bolt/include/bolt/Core/MCPlusBuilder.h @@ -450,10 +450,11 @@ public: virtual MCPhysReg getX86R11() const { llvm_unreachable("not implemented"); } /// Create increment contents of target by 1 for Instrumentation - virtual void createInstrIncMemory(InstructionListType &Instrs, - const MCSymbol *Target, MCContext *Ctx, - bool IsLeaf) const { + virtual InstructionListType createInstrIncMemory(const MCSymbol *Target, + MCContext *Ctx, + bool IsLeaf) const { llvm_unreachable("not implemented"); + return InstructionListType(); } /// Return a register number that is guaranteed to not match with diff --git a/bolt/lib/Passes/Instrumentation.cpp b/bolt/lib/Passes/Instrumentation.cpp index c6e1bf9e6b16..d8c8d419f929 100644 --- a/bolt/lib/Passes/Instrumentation.cpp +++ b/bolt/lib/Passes/Instrumentation.cpp @@ -174,12 +174,9 @@ void Instrumentation::createLeafNodeDescription(FunctionDescription &FuncDesc, InstructionListType Instrumentation::createInstrumentationSnippet(BinaryContext &BC, bool IsLeaf) { auto L = BC.scopeLock(); - MCSymbol *Label; - Label = BC.Ctx->createNamedTempSymbol("InstrEntry"); + MCSymbol *Label = BC.Ctx->createNamedTempSymbol("InstrEntry"); Summary->Counters.emplace_back(Label); - InstructionListType CounterInstrs; - BC.MIB->createInstrIncMemory(CounterInstrs, Label, &*BC.Ctx, IsLeaf); - return CounterInstrs; + return BC.MIB->createInstrIncMemory(Label, BC.Ctx.get(), IsLeaf); } // Helper instruction sequence insertion function @@ -231,8 +228,9 @@ bool Instrumentation::instrumentOneTarget( BinaryBasicBlock &FromBB, uint32_t From, BinaryFunction &ToFunc, BinaryBasicBlock *TargetBB, uint32_t ToOffset, bool IsLeaf, bool IsInvoke, FunctionDescription *FuncDesc, uint32_t FromNodeID, uint32_t ToNodeID) { + BinaryContext &BC = FromFunction.getBinaryContext(); { - auto L = FromFunction.getBinaryContext().scopeLock(); + auto L = BC.scopeLock(); bool Created = true; if (!TargetBB) Created = createCallDescription(*FuncDesc, FromFunction, From, FromNodeID, @@ -245,10 +243,8 @@ bool Instrumentation::instrumentOneTarget( return false; } - InstructionListType CounterInstrs = - createInstrumentationSnippet(FromFunction.getBinaryContext(), IsLeaf); + InstructionListType CounterInstrs = createInstrumentationSnippet(BC, IsLeaf); - BinaryContext &BC = FromFunction.getBinaryContext(); const MCInst &Inst = *Iter; if (BC.MIB->isCall(Inst)) { // This code handles both diff --git a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp index 61a7353d85a5..dbbc6888feaf 100644 --- a/bolt/lib/Target/X86/X86MCPlusBuilder.cpp +++ b/bolt/lib/Target/X86/X86MCPlusBuilder.cpp @@ -3030,11 +3030,12 @@ public: Inst.clear(); } - void createInstrIncMemory(InstructionListType &Instrs, const MCSymbol *Target, - MCContext *Ctx, bool IsLeaf) const override { + InstructionListType createInstrIncMemory(const MCSymbol *Target, + MCContext *Ctx, + bool IsLeaf) const override { + InstructionListType Instrs(IsLeaf ? 13 : 11); unsigned int I = 0; - Instrs.resize(IsLeaf ? 13 : 11); // Don't clobber application red zone (ABI dependent) if (IsLeaf) createStackPointerIncrement(Instrs[I++], 128, @@ -3061,6 +3062,7 @@ public: if (IsLeaf) createStackPointerDecrement(Instrs[I], 128, /*NoFlagsClobber=*/true); + return Instrs; } void createSwap(MCInst &Inst, MCPhysReg Source, MCPhysReg MemBaseReg,