From: Danylo Piliaiev Date: Thu, 10 Dec 2020 17:18:18 +0000 (+0200) Subject: ir3: Allow tesselation to use all 32 varying slots X-Git-Tag: upstream/21.0.0~1203 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=22180137e9709937116f622185d027a108410236;p=platform%2Fupstream%2Fmesa.git ir3: Allow tesselation to use all 32 varying slots POS, PSIZE, CLIP_DIST0, and CLIP_DIST1 have their own predefined indices, map's size should take this into account. Fixes: 9e063b01 "ir3: Switch tess lowering to use location" Signed-off-by: Danylo Piliaiev Part-of: --- diff --git a/src/freedreno/ir3/ir3_nir_lower_tess.c b/src/freedreno/ir3/ir3_nir_lower_tess.c index 87b49c9..fbb0541 100644 --- a/src/freedreno/ir3/ir3_nir_lower_tess.c +++ b/src/freedreno/ir3/ir3_nir_lower_tess.c @@ -29,7 +29,7 @@ struct state { uint32_t topology; struct primitive_map { - unsigned loc[32]; + unsigned loc[32 + 4]; /* +POSITION +PSIZE +CLIP_DIST0 +CLIP_DIST1 */ unsigned stride; } map; diff --git a/src/freedreno/ir3/ir3_shader.h b/src/freedreno/ir3/ir3_shader.h index 6b5e2af..1218b18 100644 --- a/src/freedreno/ir3/ir3_shader.h +++ b/src/freedreno/ir3/ir3_shader.h @@ -597,7 +597,7 @@ struct ir3_shader_variant { * HS, where varyings are read in the next stage via ldg with a dword * offset, and in bytes for all other stages. */ - unsigned output_loc[32]; + unsigned output_loc[32 + 4]; /* +POSITION +PSIZE +CLIP_DIST0 +CLIP_DIST1 */ /* attributes (VS) / varyings (FS): * Note that sysval's should come *after* normal inputs.