From: Huacai Chen <chenhc@lemote.com>
Date: Tue, 19 Apr 2016 11:19:11 +0000 (+0800)
Subject: drm: Loongson-3 doesn't fully support wc memory
X-Git-Tag: v5.15~13791^2~1
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=221004c66a58949a0f25c937a6789c0839feb530;p=platform%2Fkernel%2Flinux-starfive.git

drm: Loongson-3 doesn't fully support wc memory

Signed-off-by: Huacai Chen <chenhc@lemote.com>
Cc: stable@vger.kernel.org
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Dave Airlie <airlied@redhat.com>
---

diff --git a/include/drm/drm_cache.h b/include/drm/drm_cache.h
index 461a055..cebecff 100644
--- a/include/drm/drm_cache.h
+++ b/include/drm/drm_cache.h
@@ -39,6 +39,8 @@ static inline bool drm_arch_can_wc_memory(void)
 {
 #if defined(CONFIG_PPC) && !defined(CONFIG_NOT_COHERENT_CACHE)
 	return false;
+#elif defined(CONFIG_MIPS) && defined(CONFIG_CPU_LOONGSON3)
+	return false;
 #else
 	return true;
 #endif