From: Michel Pollet Date: Wed, 27 Jan 2010 16:38:08 +0000 (+0000) Subject: ARM: S3C2412: SoC has the fractional baud rate register X-Git-Tag: v3.12-rc1~10800^2~3^2~39^2~4 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=21030403209f0c253d462492f881c613bd8eeda2;p=kernel%2Fkernel-generic.git ARM: S3C2412: SoC has the fractional baud rate register The S3C2412 has a fractional baud rate register, this patch adds the corresponding flag to the UART definition to allow generation of more precise baud rates for the various clock combinations. Signed-off-by: Michel Pollet Signed-off-by: Ben Dooks --- diff --git a/drivers/serial/s3c2412.c b/drivers/serial/s3c2412.c index ce75e28..1700b1a 100644 --- a/drivers/serial/s3c2412.c +++ b/drivers/serial/s3c2412.c @@ -102,6 +102,7 @@ static struct s3c24xx_uart_info s3c2412_uart_inf = { .name = "Samsung S3C2412 UART", .type = PORT_S3C2412, .fifosize = 64, + .has_divslot = 1, .rx_fifomask = S3C2440_UFSTAT_RXMASK, .rx_fifoshift = S3C2440_UFSTAT_RXSHIFT, .rx_fifofull = S3C2440_UFSTAT_RXFULL,