From: Andrzej Hajda <a.hajda@samsung.com>
Date: Tue, 10 May 2016 13:36:51 +0000 (+0200)
Subject: drm/panel/s6e3ha2: fix initialization sequence
X-Git-Tag: accepted/tizen/common/20161219.151653~406
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=20a42c5007c9536cb909a75917243b09baff85ee;p=platform%2Fkernel%2Flinux-exynos.git

drm/panel/s6e3ha2: fix initialization sequence

Panel datasheet is not clear about it but directly after dsi interface
setting and calibration of panel, DSIM/MIC should start transmission, panel
should then wait 120ms and finish its initialization.
The patch fixes frequent image loss on draco board.

Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Change-Id: I194d5bae87bac0e436469d6f5949ee756656b16b
---

diff --git a/drivers/gpu/drm/panel/panel-s6e3ha2.c b/drivers/gpu/drm/panel/panel-s6e3ha2.c
index 2638505..ab305d0 100644
--- a/drivers/gpu/drm/panel/panel-s6e3ha2.c
+++ b/drivers/gpu/drm/panel/panel-s6e3ha2.c
@@ -490,39 +490,9 @@ static void s6e3ha2_panel_init(struct s6e3ha2 *ctx)
 	s6e3ha2_single_dsi_set1(ctx);
 	s6e3ha2_single_dsi_set2(ctx);
 
-	/* calibration enable */
 	s6e3ha2_test_key_on_fc(ctx);
 	s6e3ha2_freq_calibration(ctx);
-
-	msleep(120);
-
-	/* common setting */
-	s6e3ha2_dcs_write_seq_static(ctx, MIPI_DCS_SET_TEAR_ON, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
-
-	s6e3ha2_touch_hsync_on1(ctx);
-	s6e3ha2_pentile_control(ctx);
-	s6e3ha2_poc_global(ctx);
-	s6e3ha2_poc_setting(ctx);
 	s6e3ha2_test_key_off_fc(ctx);
-
-	/* pcd setting off for TB */
-	s6e3ha2_pcd_set_off(ctx);
-	s6e3ha2_err_fg_set(ctx);
-	s6e3ha2_te_start_setting(ctx);
-
-	/* brightness setting */
-	s6e3ha2_set_brightness(ctx->bl_dev);
-	s6e3ha2_aor_control(ctx);
-	s6e3ha2_caps_elvss_set(ctx);
-	s6e3ha2_gamma_update(ctx);
-	s6e3ha2_acl_off(ctx);
-	s6e3ha2_acl_off_opr(ctx);
-	s6e3ha2_hbm_off(ctx);
-
-	/* elvss temp compensation */
-	s6e3ha2_test_global(ctx);
-	s6e3ha2_test(ctx);
-
 	s6e3ha2_test_key_off_f0(ctx);
 }
 
@@ -610,6 +580,40 @@ static int s6e3ha2_enable(struct drm_panel *panel)
 {
 	struct s6e3ha2 *ctx = panel_to_s6e3ha2(panel);
 
+	msleep(120);
+
+	/* common setting */
+	s6e3ha2_dcs_write_seq_static(ctx, MIPI_DCS_SET_TEAR_ON, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+
+	s6e3ha2_test_key_on_f0(ctx);
+
+	s6e3ha2_test_key_on_fc(ctx);
+	s6e3ha2_touch_hsync_on1(ctx);
+	s6e3ha2_pentile_control(ctx);
+	s6e3ha2_poc_global(ctx);
+	s6e3ha2_poc_setting(ctx);
+	s6e3ha2_test_key_off_fc(ctx);
+
+	/* pcd setting off for TB */
+	s6e3ha2_pcd_set_off(ctx);
+	s6e3ha2_err_fg_set(ctx);
+	s6e3ha2_te_start_setting(ctx);
+
+
+	/* brightness setting */
+	s6e3ha2_set_brightness(ctx->bl_dev);
+	s6e3ha2_aor_control(ctx);
+	s6e3ha2_caps_elvss_set(ctx);
+	s6e3ha2_gamma_update(ctx);
+	s6e3ha2_acl_off(ctx);
+	s6e3ha2_acl_off_opr(ctx);
+	s6e3ha2_hbm_off(ctx);
+
+	/* elvss temp compensation */
+	s6e3ha2_test_global(ctx);
+	s6e3ha2_test(ctx);
+	s6e3ha2_test_key_off_f0(ctx);
+
 	s6e3ha2_dcs_write_seq_static(ctx, MIPI_DCS_SET_DISPLAY_ON);
 	if (ctx->error != 0)
 		return ctx->error;