From: David Spickett Date: Tue, 5 Jul 2022 16:14:24 +0000 (+0000) Subject: [llvm][AArch64] Fix "+all" feature for sysreg aliases X-Git-Tag: upstream/15.0.7~2588 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=20741c74c501733dbabda0848cef472131926f0c;p=platform%2Fupstream%2Fllvm.git [llvm][AArch64] Fix "+all" feature for sysreg aliases For example the predres extension adds one instruction that is a sys alias. Previously this wasn't disassembled properly with "+all". This was because a check for "+all" was added to haveFeatures in AArch64SysReg but not in SysAlias. Reviewed By: MaskRay, lenary Differential Revision: https://reviews.llvm.org/D129147 --- diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h index 7130361..cf8891c 100644 --- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.h @@ -343,7 +343,8 @@ struct SysAlias { : Name(N), Encoding(E), FeaturesRequired(F) {} bool haveFeatures(FeatureBitset ActiveFeatures) const { - return (FeaturesRequired & ActiveFeatures) == FeaturesRequired; + return ActiveFeatures[llvm::AArch64::FeatureAll] || + (FeaturesRequired & ActiveFeatures) == FeaturesRequired; } FeatureBitset getRequiredFeatures() const { return FeaturesRequired; } diff --git a/llvm/test/MC/Disassembler/AArch64/mattr-all.txt b/llvm/test/MC/Disassembler/AArch64/mattr-all.txt index 0d3f13f..87dc73a 100644 --- a/llvm/test/MC/Disassembler/AArch64/mattr-all.txt +++ b/llvm/test/MC/Disassembler/AArch64/mattr-all.txt @@ -35,3 +35,7 @@ ## armv9a rme # CHECK: mrs x0, MFAR_EL3 [0xa0,0x60,0x3e,0xd5] + +## predres (to make sure sysreg aliases work) +# CHECK: cfp rctx, x0 +[0x80,0x73,0x0b,0xd5]