From: Conor Dooley Date: Thu, 7 Jul 2022 14:20:42 +0000 (+0100) Subject: MAINTAINERS: add polarfire rng, pci and clock drivers X-Git-Tag: v6.1-rc5~892^2~8 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=2058dc831ff82eb8e93e882efd1ca964bd8a74c8;p=platform%2Fkernel%2Flinux-starfive.git MAINTAINERS: add polarfire rng, pci and clock drivers Hardware random, PCI and clock drivers for the PolarFire SoC have been upstreamed but are not covered by the MAINTAINERS entry, so add them. Daire is the author of the clock & PCI drivers, so add him as a maintainer in place of Lewis. Signed-off-by: Conor Dooley Acked-by: Bjorn Helgaas Acked-by: Stephen Boyd Link: https://lore.kernel.org/r/20220707142041.4096246-1-conor.dooley@microchip.com' Signed-off-by: Arnd Bergmann --- diff --git a/MAINTAINERS b/MAINTAINERS index e20124d..7a3eab7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17202,12 +17202,15 @@ N: riscv K: riscv RISC-V/MICROCHIP POLARFIRE SOC SUPPORT -M: Lewis Hanly M: Conor Dooley +M: Daire McNamara L: linux-riscv@lists.infradead.org S: Supported F: arch/riscv/boot/dts/microchip/ +F: drivers/char/hw_random/mpfs-rng.c +F: drivers/clk/microchip/clk-mpfs.c F: drivers/mailbox/mailbox-mpfs.c +F: drivers/pci/controller/pcie-microchip-host.c F: drivers/soc/microchip/ F: include/soc/microchip/mpfs.h