From: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Date: Tue, 7 Mar 2023 04:09:38 +0000 (-0500)
Subject: agx: Don't overallocate registers
X-Git-Tag: upstream/23.3.3~10332
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=203c9c12e23a80b749a58d18ede84fc7491bc926;p=platform%2Fupstream%2Fmesa.git

agx: Don't overallocate registers

We need to account for the full vector lengths. Especially important once we
start restricting the reg file.

Signed-off-by: Alyssa Rosenzweig <alyssa@rosenzweig.io>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/22353>
---

diff --git a/src/asahi/compiler/agx_register_allocate.c b/src/asahi/compiler/agx_register_allocate.c
index 67f85b3..0071530 100644
--- a/src/asahi/compiler/agx_register_allocate.c
+++ b/src/asahi/compiler/agx_register_allocate.c
@@ -172,7 +172,7 @@ find_regs(BITSET_WORD *used_regs, unsigned count, unsigned align, unsigned max)
 {
    assert(count >= 1);
 
-   for (unsigned reg = 0; reg < max; reg += align) {
+   for (unsigned reg = 0; reg + count <= max; reg += align) {
       if (!BITSET_TEST_RANGE(used_regs, reg, reg + count - 1))
          return reg;
    }
@@ -328,7 +328,8 @@ pick_regs(struct ra_ctx *rctx, agx_instr *I, unsigned d)
        * for a register for the source such that the collect base is aligned.
        */
       if (collect_align > align) {
-         for (unsigned reg = offset; reg < rctx->bound; reg += collect_align) {
+         for (unsigned reg = offset; reg + collect_align <= rctx->bound;
+              reg += collect_align) {
             if (!BITSET_TEST_RANGE(rctx->used_regs, reg, reg + count - 1))
                return reg;
          }