From: Alan Modra Date: Wed, 3 Dec 2003 11:09:55 +0000 (+0000) Subject: re PR target/11229 (pure-1.c fails on powerpc64-linux with -O1) X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=1fcc57f1958ac52239279de6d3a6b1979e32700b;p=platform%2Fupstream%2Fgcc.git re PR target/11229 (pure-1.c fails on powerpc64-linux with -O1) PR target/11229 * cse.c (cse_insn): Set classp using src_const_elt if src_eqv_elt is NULL. From-SVN: r74225 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1a51101..6c03f95 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2003-12-03 Alan Modra + + PR target/11229 + * cse.c (cse_insn): Set classp using src_const_elt if + src_eqv_elt is NULL. + 2003-12-03 Richard Earnshaw * gcse.c (reg_clear_last_set): New function. diff --git a/gcc/cse.c b/gcc/cse.c index faaf187..4b0f1ec 100644 --- a/gcc/cse.c +++ b/gcc/cse.c @@ -5827,6 +5827,16 @@ cse_insn (rtx insn, rtx libcall_insn) enum machine_mode mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src); + /* It's possible that we have a source value known to be + constant but don't have a REG_EQUAL note on the insn. + Lack of a note will mean src_eqv_elt will be NULL. This + can happen where we've generated a SUBREG to access a + CONST_INT that is already in a register in a wider mode. + Ensure that the source expression is put in the proper + constant class. */ + if (!classp) + classp = sets[i].src_const_elt; + if (sets[i].src_elt == 0) { /* Don't put a hard register source into the table if this is