From: Michael Hayes Date: Sat, 25 Jan 2003 00:35:36 +0000 (+0000) Subject: c4x.md (UNSPEC_BU): New constants. X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=1e4c04e02ab3913e505993c9b60b2ea35836376b;p=platform%2Fupstream%2Fgcc.git c4x.md (UNSPEC_BU): New constants. * config/c4x/c4x.md (UNSPEC_BU): New constants. (UNSPEC_RPTS, UNSPEC_LSH, UNSPEC_CMPHI, UNSPEC_RCPF): Likewise. (UNSPEC_RND, UNSPEC_RPTB_FILL, UNSPEC_LOADHF_INT): Likewise. (UNSPEC_STOREHF_INT, UNSPEC_RSQRF, UNSPEC_LOADQF_INT): Likewise. (UNSPEC_STOREQF_INT, UNSPEC_LDIV, UNSPEC_PUSH_ST): Likewise. (UNSPEC_POP_ST, UNSPEC_PUSH_DP, UNSPEC_POP_DP): Likewise. (UNSPEC_POPQI, UNSPEC_POPQF, UNSPEC_ANDN_ST): Likewise. (UNSPEC_RPTB_INIT, UNSPEC_TOIEEE, UNSPEC_FRIEEE): Likewise. From-SVN: r61754 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a445828..1cb8d9e 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,6 +1,17 @@ +2003-01-25 Michael Hayes + + * config/c4x/c4x.md (UNSPEC_BU): New constants. + (UNSPEC_RPTS, UNSPEC_LSH, UNSPEC_CMPHI, UNSPEC_RCPF): Likewise. + (UNSPEC_RND, UNSPEC_RPTB_FILL, UNSPEC_LOADHF_INT): Likewise. + (UNSPEC_STOREHF_INT, UNSPEC_RSQRF, UNSPEC_LOADQF_INT): Likewise. + (UNSPEC_STOREQF_INT, UNSPEC_LDIV, UNSPEC_PUSH_ST): Likewise. + (UNSPEC_POP_ST, UNSPEC_PUSH_DP, UNSPEC_POP_DP): Likewise. + (UNSPEC_POPQI, UNSPEC_POPQF, UNSPEC_ANDN_ST): Likewise. + (UNSPEC_RPTB_INIT, UNSPEC_TOIEEE, UNSPEC_FRIEEE): Likewise. + Fri Jan 24 23:44:12 CET 2003 Jan Hubicka - * emit-rtl.c (reg_attrs_htab): New static variable. +: New static variable. (reg_attrs_htab_hash, reg_attrs_htab_eq, get_reg_attrs): New static functions. (reg_rtx): Do not maintain regno_decl. diff --git a/gcc/config/c4x/c4x.md b/gcc/config/c4x/c4x.md index 9358f39..de1bb60 100644 --- a/gcc/config/c4x/c4x.md +++ b/gcc/config/c4x/c4x.md @@ -446,29 +446,32 @@ ; ; C4x UNSPEC NUMBERS ; -; 1 BU/BUD -; 2 RPTS -; 3 LSH -; 4 cmphi -; 5 RCPF -; 6 RND -; 7 repeat block filler -; 8 loadhf_int -; 9 storehf_int -; 10 RSQRF -; 11 loadqf_int -; 12 storeqf_int -; 13 Conditional load on overflow -; 14 push_st -; 15 pop_st -; 16 push_dp -; 17 pop_dp -; 18 popqi_unspec -; 19 popqf_unspec -; 20 andn_st -; 22 rptb_init -; 23 toieee -; 24 frieee +(define_constants + [ + (UNSPEC_BU 1) + (UNSPEC_RPTS 2) + (UNSPEC_LSH 3) + (UNSPEC_CMPHI 4) + (UNSPEC_RCPF 5) + (UNSPEC_RND 6) + (UNSPEC_RPTB_FILL 7) + (UNSPEC_LOADHF_INT 8) + (UNSPEC_STOREHF_INT 9) + (UNSPEC_RSQRF 10) + (UNSPEC_LOADQF_INT 11) + (UNSPEC_STOREQF_INT 12) + (UNSPEC_LDIV 13) + (UNSPEC_PUSH_ST 14) + (UNSPEC_POP_ST 15) + (UNSPEC_PUSH_DP 16) + (UNSPEC_POP_DP 17) + (UNSPEC_POPQI 18) + (UNSPEC_POPQF 19) + (UNSPEC_ANDN_ST 20) + (UNSPEC_RPTB_INIT 22) + (UNSPEC_TOIEEE 23) + (UNSPEC_FRIEEE 24) + ]) ; ; C4x FUNCTIONAL UNITS @@ -1414,14 +1417,16 @@ [(set_attr "type" "push")]) (define_insn "push_st" - [(set (mem:QI (pre_inc:QI (reg:QI 20))) (unspec:QI [(reg:QI 21)] 14)) + [(set (mem:QI (pre_inc:QI (reg:QI 20))) + (unspec:QI [(reg:QI 21)] UNSPEC_PUSH_ST)) (use (reg:QI 21))] "" "push\\tst" [(set_attr "type" "push")]) (define_insn "push_dp" - [(set (mem:QI (pre_inc:QI (reg:QI 20))) (unspec:QI [(reg:QI 16)] 16)) + [(set (mem:QI (pre_inc:QI (reg:QI 20))) + (unspec:QI [(reg:QI 16)] UNSPEC_PUSH_DP)) (use (reg:QI 16))] "" "push\\tdp" @@ -1436,21 +1441,23 @@ [(set_attr "type" "pop")]) (define_insn "pop_st" - [(set (unspec:QI [(reg:QI 21)] 15) (mem:QI (post_dec:QI (reg:QI 20)))) + [(set (unspec:QI [(reg:QI 21)] UNSPEC_POP_ST) + (mem:QI (post_dec:QI (reg:QI 20)))) (clobber (reg:CC 21))] "" "pop\\tst" [(set_attr "type" "pop")]) (define_insn "pop_dp" - [(set (unspec:QI [(reg:QI 16)] 17) (mem:QI (post_dec:QI (reg:QI 20)))) + [(set (unspec:QI [(reg:QI 16)] UNSPEC_POP_DP) + (mem:QI (post_dec:QI (reg:QI 20)))) (clobber (reg:CC 16))] "" "pop\\tdp" [(set_attr "type" "pop")]) (define_insn "popqi_unspec" - [(set (unspec:QI [(match_operand:QI 0 "reg_operand" "=r")] 18) + [(set (unspec:QI [(match_operand:QI 0 "reg_operand" "=r")] UNSPEC_POPQI) (mem:QI (post_dec:QI (reg:QI 20)))) (clobber (match_dup 0)) (clobber (reg:CC 21))] @@ -2489,7 +2496,7 @@ (define_insn "andn_st" [(set (unspec:QI [(reg:QI 21)] 20) - (and:QI (unspec:QI [(reg:QI 21)] 20) + (and:QI (unspec:QI [(reg:QI 21)] UNSPEC_ANDN_ST) (match_operand:QI 0 "" "N"))) (use (match_dup 0)) (use (reg:CC 21)) @@ -2890,7 +2897,7 @@ (define_insn "*lshlqi3_clobber" [(set (match_operand:QI 0 "reg_operand" "=d,d,?d,c,c,?c") (ashift:QI (match_operand:QI 1 "src_operand" "0,rR,rS<>,0,rR,rS<>") - (unspec:QI [(match_operand:QI 2 "src_operand" "rIm,JR,rS<>,rIm,JR,rS<>")] 3))) + (unspec:QI [(match_operand:QI 2 "src_operand" "rIm,JR,rS<>,rIm,JR,rS<>")] UNSPEC_LSH))) (clobber (reg:CC 21))] "valid_operands (ASHIFT, operands, QImode)" "@ @@ -3425,7 +3432,7 @@ ; This can generate invalid stack slot displacements (define_split [(set (match_operand:QI 0 "reg_operand" "") - (unspec:QI [(match_operand:QF 1 "reg_operand" "")] 12))] + (unspec:QI [(match_operand:QF 1 "reg_operand" "")] UNSPEC_STOREQF_INT))] "reload_completed" [(set (match_dup 3) (match_dup 1)) (set (match_dup 0) (match_dup 2))] @@ -3436,14 +3443,14 @@ (define_insn "storeqf_int" [(set (match_operand:QI 0 "reg_operand" "=r") - (unspec:QI [(match_operand:QF 1 "reg_operand" "f")] 12))] + (unspec:QI [(match_operand:QF 1 "reg_operand" "f")] UNSPEC_STOREQF_INT))] "" "#" [(set_attr "type" "multi")]) (define_split [(parallel [(set (match_operand:QI 0 "reg_operand" "") - (unspec:QI [(match_operand:QF 1 "reg_operand" "")] 12)) + (unspec:QI [(match_operand:QF 1 "reg_operand" "")] UNSPEC_STOREQF_INT)) (clobber (reg:CC 21))])] "reload_completed" [(set (mem:QF (pre_inc:QI (reg:QI 20))) @@ -3468,7 +3475,7 @@ (define_insn "storeqf_int_clobber" [(parallel [(set (match_operand:QI 0 "reg_operand" "=r") - (unspec:QI [(match_operand:QF 1 "reg_operand" "f")] 12)) + (unspec:QI [(match_operand:QF 1 "reg_operand" "f")] UNSPEC_STOREQF_INT)) (clobber (reg:CC 21))])] "" "#" @@ -3478,7 +3485,7 @@ ; This can generate invalid stack slot displacements (define_split [(set (match_operand:QF 0 "reg_operand" "") - (unspec:QF [(match_operand:QI 1 "reg_operand" "")] 11))] + (unspec:QF [(match_operand:QI 1 "reg_operand" "")] UNSPEC_LOADQF_INT))] "reload_completed" [(set (match_dup 2) (match_dup 1)) (set (match_dup 0) (match_dup 3))] @@ -3489,14 +3496,14 @@ (define_insn "loadqf_int" [(set (match_operand:QF 0 "reg_operand" "=f") - (unspec:QF [(match_operand:QI 1 "reg_operand" "r")] 11))] + (unspec:QF [(match_operand:QI 1 "reg_operand" "r")] UNSPEC_LOADQF_INT))] "" "#" [(set_attr "type" "multi")]) (define_split [(parallel [(set (match_operand:QF 0 "reg_operand" "") - (unspec:QF [(match_operand:QI 1 "reg_operand" "")] 11)) + (unspec:QF [(match_operand:QI 1 "reg_operand" "")] UNSPEC_LOADQF_INT)) (clobber (reg:CC 21))])] "reload_completed" [(set (mem:QI (pre_inc:QI (reg:QI 20))) @@ -3508,7 +3515,7 @@ (define_insn "loadqf_int_clobber" [(parallel [(set (match_operand:QF 0 "reg_operand" "=f") - (unspec:QF [(match_operand:QI 1 "reg_operand" "r")] 11)) + (unspec:QF [(match_operand:QI 1 "reg_operand" "r")] UNSPEC_LOADQF_INT)) (clobber (reg:CC 21))])] "" "#" @@ -3586,7 +3593,7 @@ [(set_attr "type" "pop")]) (define_insn "popqf_unspec" - [(set (unspec:QF [(match_operand:QF 0 "reg_operand" "=f")] 19) + [(set (unspec:QF [(match_operand:QF 0 "reg_operand" "=f")] UNSPEC_POPQF) (mem:QF (post_dec:QI (reg:QI 20)))) (clobber (match_dup 0)) (clobber (reg:CC 21))] @@ -3867,7 +3874,7 @@ (const_int 0))) (set (match_dup 4) (fix:QI (match_dup 3)))]) - (parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] 13)) + (parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] UNSPEC_LDIV)) (use (reg:CC 21))]) (set (match_operand:QI 0 "reg_operand" "=r") (match_dup 4))] "" @@ -3889,7 +3896,7 @@ (const_int 0))) (set (match_dup 4) (fix:QI (match_dup 3)))]) - (parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] 13)) + (parallel [(set (match_dup 4) (unspec:QI [(match_dup 2)] UNSPEC_LDIV)) (use (reg:CC 21))]) (set (match_operand:QI 0 "reg_operand" "=r") (match_dup 4))] "" @@ -3913,7 +3920,7 @@ ; (define_insn "rcpfqf_clobber" [(set (match_operand:QF 0 "reg_operand" "=f") - (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 5)) + (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_RCPF)) (clobber (reg:CC_NOOV 21))] "! TARGET_C3X" "rcpf\\t%1,%0" @@ -3924,7 +3931,7 @@ ; (define_insn "*rsqrfqf_clobber" [(set (match_operand:QF 0 "reg_operand" "=f") - (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 10)) + (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_RSQRF)) (clobber (reg:CC_NOOV 21))] "! TARGET_C3X" "rsqrf\\t%1,%0" @@ -3935,7 +3942,7 @@ ; (define_insn "*rndqf_clobber" [(set (match_operand:QF 0 "reg_operand" "=f") - (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 6)) + (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_RND)) (clobber (reg:CC_NOOV 21))] "! TARGET_C3X" "rnd\\t%1,%0" @@ -3945,7 +3952,7 @@ ; Inlined float square root for C4x (define_expand "sqrtqf2_inline" [(parallel [(set (match_dup 2) - (unspec:QF [(match_operand:QF 1 "src_operand" "")] 10)) + (unspec:QF [(match_operand:QF 1 "src_operand" "")] UNSPEC_RSQRF)) (clobber (reg:CC_NOOV 21))]) (parallel [(set (match_dup 3) (mult:QF (match_dup 5) (match_dup 1))) (clobber (reg:CC_NOOV 21))]) @@ -3968,7 +3975,7 @@ (parallel [(set (match_dup 4) (mult:QF (match_dup 2) (match_dup 1))) (clobber (reg:CC_NOOV 21))]) (parallel [(set (match_operand:QF 0 "reg_operand" "") - (unspec:QF [(match_dup 4)] 6)) + (unspec:QF [(match_dup 4)] UNSPEC_RND)) (clobber (reg:CC_NOOV 21))])] "! TARGET_C3X" "if (! reload_in_progress @@ -3993,14 +4000,14 @@ ; (define_insn "toieee" [(set (match_operand:QF 0 "reg_operand" "=f") - (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] 23)) + (unspec:QF [(match_operand:QF 1 "src_operand" "fHm")] UNSPEC_TOIEEE)) (clobber (reg:CC 21))] "" "toieee\\t%1,%0") (define_insn "frieee" [(set (match_operand:QF 0 "reg_operand" "=f") - (unspec:QF [(match_operand:QF 1 "memory_operand" "m")] 24)) + (unspec:QF [(match_operand:QF 1 "memory_operand" "m")] UNSPEC_FRIEEE)) (clobber (reg:CC 21))] "" "frieee\\t%1,%0") @@ -4203,7 +4210,7 @@ ; Inlined float divide for C4x (define_expand "divqf3_inline" [(parallel [(set (match_dup 3) - (unspec:QF [(match_operand:QF 2 "src_operand" "")] 5)) + (unspec:QF [(match_operand:QF 2 "src_operand" "")] UNSPEC_RCPF)) (clobber (reg:CC_NOOV 21))]) (parallel [(set (match_dup 4) (mult:QF (match_dup 2) (match_dup 3))) (clobber (reg:CC_NOOV 21))]) @@ -4222,7 +4229,7 @@ (match_dup 3))) (clobber (reg:CC_NOOV 21))]) (parallel [(set (match_operand:QF 0 "reg_operand" "") - (unspec:QF [(match_dup 3)] 6)) + (unspec:QF [(match_dup 3)] UNSPEC_RND)) (clobber (reg:CC_NOOV 21))])] "! TARGET_C3X" "if (! reload_in_progress @@ -4278,7 +4285,7 @@ (define_insn "*ldi_on_overflow" [(set (match_operand:QI 0 "reg_operand" "=r") - (unspec:QI [(match_operand:QI 1 "src_operand" "rIm")] 13)) + (unspec:QI [(match_operand:QI 1 "src_operand" "rIm")] UNSPEC_LDIV)) (use (reg:CC 21))] "" "ldiv\\t%1,%0" @@ -4519,7 +4526,7 @@ (define_insn "*bu" [(set (pc) - (unspec [(match_operand:QI 0 "reg_operand" "r")] 1))] + (unspec [(match_operand:QI 0 "reg_operand" "r")] UNSPEC_BU))] "" "bu%#\\t%0" [(set_attr "type" "jump")]) @@ -4695,7 +4702,7 @@ (define_insn "*toieee_movqf_clobber" [(set (match_operand:QF 0 "ext_low_reg_operand" "=q") - (unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] 23)) + (unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] UNSPEC_TOIEEE)) (set (match_operand:QF 2 "par_ind_operand" "=S<>") (match_operand:QF 3 "ext_low_reg_operand" "q")) (clobber (reg:CC 21))] @@ -4709,7 +4716,7 @@ (define_insn "*frieee_movqf_clobber" [(set (match_operand:QF 0 "ext_low_reg_operand" "=q") - (unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] 24)) + (unspec:QF [(match_operand:QF 1 "par_ind_operand" "S<>")] UNSPEC_FRIEEE)) (set (match_operand:QF 2 "par_ind_operand" "=S<>") (match_operand:QF 3 "ext_low_reg_operand" "q")) (clobber (reg:CC 21))] @@ -5504,7 +5511,7 @@ (define_insn "rpts_top" [(unspec [(use (label_ref (match_operand 0 "" ""))) - (use (label_ref (match_operand 1 "" "")))] 2) + (use (label_ref (match_operand 1 "" "")))] UNSPEC_RPTS) (clobber (reg:QI 25)) (clobber (reg:QI 26))] "" @@ -5517,7 +5524,7 @@ ; This pattern needs to be emitted at the start of the loop to ; say that RS and RE are loaded. (define_insn "rptb_init" - [(unspec [(match_operand:QI 0 "register_operand" "va")] 22) + [(unspec [(match_operand:QI 0 "register_operand" "va")] UNSPEC_RPTB_INIT) (clobber (reg:QI 25)) (clobber (reg:QI 26))] "" @@ -5893,7 +5900,7 @@ "reload_completed" [(set (match_dup 0) (float_extend:HF (match_dup 2))) (set (match_dup 0) (unspec:HF [(subreg:QI (match_dup 0) 0) - (match_dup 3)] 8))] + (match_dup 3)] UNSPEC_LOADHF_INT))] "operands[2] = c4x_operand_subword (operands[1], 0, 1, HFmode); operands[3] = c4x_operand_subword (operands[1], 1, 1, HFmode); PUT_MODE (operands[2], QFmode); @@ -5905,7 +5912,7 @@ "reload_completed && 0" [(set (match_dup 0) (float_extend:HF (match_dup 2))) (set (match_dup 0) (unspec:HF [(subreg:QI (match_dup 0) 0) - (match_dup 3)] 8))] + (match_dup 3)] UNSPEC_LOADHF_INT))] "operands[2] = c4x_operand_subword (operands[1], 0, 1, HFmode); operands[3] = c4x_operand_subword (operands[1], 1, 1, HFmode); PUT_MODE (operands[2], QFmode); @@ -5916,7 +5923,7 @@ (match_operand:HF 1 "reg_operand" ""))] "reload_completed" [(set (match_dup 2) (float_truncate:QF (match_dup 1))) - (set (match_dup 3) (unspec:QI [(match_dup 1)] 9))] + (set (match_dup 3) (unspec:QI [(match_dup 1)] UNSPEC_STOREHF_INT))] "operands[2] = c4x_operand_subword (operands[0], 0, 1, HFmode); operands[3] = c4x_operand_subword (operands[0], 1, 1, HFmode); PUT_MODE (operands[2], QFmode); @@ -5932,7 +5939,7 @@ (define_insn "*loadhf_int" [(set (match_operand:HF 0 "reg_operand" "+h") (unspec:HF [(subreg:QI (match_dup 0) 0) - (match_operand:QI 1 "src_operand" "rIm")] 8))] + (match_operand:QI 1 "src_operand" "rIm")] UNSPEC_LOADHF_INT))] "" "ldiu\\t%1,%0" [(set_attr "type" "unary")]) @@ -5946,7 +5953,7 @@ (define_insn "*storehf_int" [(set (match_operand:QI 0 "memory_operand" "=m") - (unspec:QI [(match_operand:HF 1 "reg_operand" "h")] 9))] + (unspec:QI [(match_operand:HF 1 "reg_operand" "h")] UNSPEC_STOREHF_INT))] "" "sti\\t%1,%0" [(set_attr "type" "store")]) @@ -5983,7 +5990,7 @@ [(set (mem:QF (pre_inc:QI (reg:QI 20))) (float_truncate:QF (match_dup 0))) (set (mem:QI (pre_inc:QI (reg:QI 20))) - (unspec:QI [(match_dup 0)] 9))] + (unspec:QI [(match_dup 0)] UNSPEC_STOREHF_INT))] "") (define_insn "pushhf_trunc" @@ -5995,7 +6002,7 @@ (define_insn "pushhf_int" [(set (mem:QI (pre_inc:QI (reg:QI 20))) - (unspec:QI [(match_operand:HF 0 "reg_operand" "h")] 9))] + (unspec:QI [(match_operand:HF 0 "reg_operand" "h")] UNSPEC_STOREHF_INT))] "" "push\\t%0" [(set_attr "type" "push")]) @@ -6019,14 +6026,14 @@ (clobber (reg:CC 21))]) (parallel [(set (match_dup 0) (unspec:HF [(subreg:QI (match_dup 0) 0) - (mem:QI (post_dec:QI (reg:QI 20)))] 8)) + (mem:QI (post_dec:QI (reg:QI 20)))] UNSPEC_LOADHF_INT)) (clobber (reg:CC 21))])] "") (define_insn "*pophf_int" [(set (match_operand:HF 0 "reg_operand" "+h") (unspec:HF [(subreg:QI (match_dup 0) 0) - (mem:QI (post_dec:QI (reg:QI 20)))] 8)) + (mem:QI (post_dec:QI (reg:QI 20)))] UNSPEC_LOADHF_INT)) (clobber (reg:CC 21))] "" "pop\\t%0" @@ -6131,7 +6138,7 @@ ; (define_insn "*rcpfhf_clobber" [(set (match_operand:HF 0 "reg_operand" "=h") - (unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] 5)) + (unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] UNSPEC_RCPF)) (clobber (reg:CC_NOOV 21))] "! TARGET_C3X" "rcpf\\t%1,%0" @@ -6142,7 +6149,7 @@ ; (define_insn "*rsqrfhf_clobber" [(set (match_operand:HF 0 "reg_operand" "=h") - (unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] 10)) + (unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] UNSPEC_RSQRF)) (clobber (reg:CC_NOOV 21))] "! TARGET_C3X" "rsqrf\\t%1,%0" @@ -6153,7 +6160,7 @@ ; (define_insn "*rndhf_clobber" [(set (match_operand:HF 0 "reg_operand" "=h") - (unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] 6)) + (unspec:HF [(match_operand:HF 1 "reg_or_const_operand" "hH")] UNSPEC_RND)) (clobber (reg:CC_NOOV 21))] "! TARGET_C3X" "rnd\\t%1,%0" @@ -6163,7 +6170,7 @@ ; Inlined float square root for C4x (define_expand "sqrthf2_inline" [(parallel [(set (match_dup 2) - (unspec:HF [(match_operand:HF 1 "reg_operand" "")] 10)) + (unspec:HF [(match_operand:HF 1 "reg_operand" "")] UNSPEC_RSQRF)) (clobber (reg:CC_NOOV 21))]) (parallel [(set (match_dup 3) (mult:HF (match_dup 5) (match_dup 1))) (clobber (reg:CC_NOOV 21))]) @@ -6310,7 +6317,7 @@ ; Inlined float divide for C4x (define_expand "divhf3_inline" [(parallel [(set (match_dup 3) - (unspec:HF [(match_operand:HF 2 "reg_operand" "")] 5)) + (unspec:HF [(match_operand:HF 2 "reg_operand" "")] UNSPEC_RCPF)) (clobber (reg:CC_NOOV 21))]) (parallel [(set (match_dup 4) (mult:HF (match_dup 2) (match_dup 3))) (clobber (reg:CC_NOOV 21))]) @@ -6886,7 +6893,7 @@ /* If the shift count is greater than 32 this will do an arithmetic right shift. However, we need a logical right shift. */ (parallel [(set (match_dup 9) - (ashift:QI (match_dup 4) (unspec:QI [(match_dup 10)] 3))) + (ashift:QI (match_dup 4) (unspec:QI [(match_dup 10)] UNSPEC_LSH))) (clobber (reg:CC 21))]) (set (match_dup 6) (match_dup 8)) (parallel [(set (match_dup 5) @@ -7010,7 +7017,7 @@ "! reload_completed" [(parallel [(set (reg:CC 21) (unspec:CC [(compare:CC (match_dup 0) - (match_dup 1))] 4)) + (match_dup 1))] UNSPEC_CMPHI)) (clobber (match_scratch:QI 2 "")) (clobber (match_scratch:QI 3 ""))])] "") @@ -7022,7 +7029,7 @@ "! reload_completed" [(parallel [(set (reg:CC_NOOV 21) (unspec:CC_NOOV [(compare:CC_NOOV (match_dup 0) - (match_dup 1))] 4)) + (match_dup 1))] UNSPEC_CMPHI)) (clobber (match_scratch:QI 2 "")) (clobber (match_scratch:QI 3 ""))])] "") @@ -7154,7 +7161,7 @@ (define_insn "cmphi_cc" [(set (reg:CC 21) (unspec:CC [(compare:CC (match_operand:HI 0 "src_operand" "rR,rS<>") - (match_operand:HI 1 "src_operand" "R,rS<>"))] 4)) + (match_operand:HI 1 "src_operand" "R,rS<>"))] UNSPEC_CMPHI)) (clobber (match_scratch:QI 2 "=&d,&d")) (clobber (match_scratch:QI 3 "=&c,&c"))] "valid_operands (COMPARE, operands, HImode)" @@ -7170,7 +7177,7 @@ (define_insn "cmphi_cc_noov" [(set (reg:CC_NOOV 21) (unspec:CC_NOOV [(compare:CC_NOOV (match_operand:HI 0 "src_operand" "rR,rS<>") - (match_operand:HI 1 "src_operand" "R,rS<>"))] 4)) + (match_operand:HI 1 "src_operand" "R,rS<>"))] UNSPEC_CMPHI)) (clobber (match_scratch:QI 2 "=&d,&d")) (clobber (match_scratch:QI 3 "=&c,&c"))] "valid_operands (COMPARE, operands, HImode)"