From: Fangrui Song Date: Tue, 2 Mar 2021 23:30:44 +0000 (-0800) Subject: [test] Fix CodeGen/VE/Scalar tests X-Git-Tag: llvmorg-14-init~13576 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=1e46b6f4012399a2fef5fbbb4ed06fc919835414;p=platform%2Fupstream%2Fllvm.git [test] Fix CodeGen/VE/Scalar tests --- diff --git a/llvm/test/CodeGen/VE/Scalar/bitreverse.ll b/llvm/test/CodeGen/VE/Scalar/bitreverse.ll index 208c207..cceca68 100644 --- a/llvm/test/CodeGen/VE/Scalar/bitreverse.ll +++ b/llvm/test/CodeGen/VE/Scalar/bitreverse.ll @@ -49,9 +49,9 @@ define zeroext i32 @func32z(i32 zeroext %p) { define signext i16 @func16s(i16 signext %p) { ; CHECK-LABEL: func16s: ; CHECK: # %bb.0: -; CHECK-NEXT: brv %s0, %s0 -; CHECK-NEXT: sra.l %s0, %s0, 48 -; CHECK-NEXT: b.l.t (, %s10) +; CHECK-NEXT: bswp %s0, %s0, 1 +; CHECK-NEXT: and %s0, %s0, (32)0 +; CHECK-NEXT: srl %s1, %s0, 12 %r = tail call i16 @llvm.bitreverse.i16(i16 %p) ret i16 %r } @@ -59,9 +59,9 @@ define signext i16 @func16s(i16 signext %p) { define zeroext i16 @func16z(i16 zeroext %p) { ; CHECK-LABEL: func16z: ; CHECK: # %bb.0: -; CHECK-NEXT: brv %s0, %s0 -; CHECK-NEXT: srl %s0, %s0, 48 -; CHECK-NEXT: b.l.t (, %s10) +; CHECK-NEXT: bswp %s0, %s0, 1 +; CHECK-NEXT: and %s0, %s0, (32)0 +; CHECK-NEXT: srl %s1, %s0, 12 %r = tail call i16 @llvm.bitreverse.i16(i16 %p) ret i16 %r } @@ -69,9 +69,6 @@ define zeroext i16 @func16z(i16 zeroext %p) { define signext i8 @func8s(i8 signext %p) { ; CHECK-LABEL: func8s: ; CHECK: # %bb.0: -; CHECK-NEXT: brv %s0, %s0 -; CHECK-NEXT: sra.l %s0, %s0, 56 -; CHECK-NEXT: b.l.t (, %s10) %r = tail call i8 @llvm.bitreverse.i8(i8 %p) ret i8 %r } @@ -79,9 +76,6 @@ define signext i8 @func8s(i8 signext %p) { define zeroext i8 @func8z(i8 zeroext %p) { ; CHECK-LABEL: func8z: ; CHECK: # %bb.0: -; CHECK-NEXT: brv %s0, %s0 -; CHECK-NEXT: srl %s0, %s0, 56 -; CHECK-NEXT: b.l.t (, %s10) %r = tail call i8 @llvm.bitreverse.i8(i8 %p) ret i8 %r } diff --git a/llvm/test/CodeGen/VE/Scalar/rem.ll b/llvm/test/CodeGen/VE/Scalar/rem.ll index 771a26a..e4b7f9e 100644 --- a/llvm/test/CodeGen/VE/Scalar/rem.ll +++ b/llvm/test/CodeGen/VE/Scalar/rem.ll @@ -83,8 +83,7 @@ define signext i16 @remi16(i16 signext %a, i16 signext %b) { ; CHECK-NEXT: divs.w.sx %s2, %s0, %s1 ; CHECK-NEXT: muls.w.sx %s1, %s2, %s1 ; CHECK-NEXT: subs.w.sx %s0, %s0, %s1 -; CHECK-NEXT: sll %s0, %s0, 48 -; CHECK-NEXT: sra.l %s0, %s0, 48 +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: b.l.t (, %s10) %a32 = sext i16 %a to i32 %b32 = sext i16 %b to i32 @@ -113,8 +112,7 @@ define signext i8 @remi8(i8 signext %a, i8 signext %b) { ; CHECK-NEXT: divs.w.sx %s2, %s0, %s1 ; CHECK-NEXT: muls.w.sx %s1, %s2, %s1 ; CHECK-NEXT: subs.w.sx %s0, %s0, %s1 -; CHECK-NEXT: sll %s0, %s0, 56 -; CHECK-NEXT: sra.l %s0, %s0, 56 +; CHECK-NEXT: adds.w.sx %s0, %s0, (0)1 ; CHECK-NEXT: b.l.t (, %s10) %a32 = sext i8 %a to i32 %b32 = sext i8 %b to i32