From: JinZe Xu Date: Tue, 20 Jun 2023 15:31:00 +0000 (-0700) Subject: drm/amd/display: Setup stream encoder before link enable for TMDS X-Git-Tag: v6.6.7~1918^2~20^2~126 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=1d96adb1946ca84ccd20b4e7a8f684cff5b0d99c;p=platform%2Fkernel%2Flinux-starfive.git drm/amd/display: Setup stream encoder before link enable for TMDS [Why] HDMI spec requires TMDS clock to be not more than 340MHz. Stream encoder ensure this requirement but driver enable stream encoder later than PHY. So PHY will output full speed TMDS clock first. [How] Enable stream encoder first in TMDS case. Reviewed-by: Nicholas Kazlauskas Acked-by: Alan Liu Signed-off-by: JinZe Xu Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c index 1a7b93e..d8fcff0 100644 --- a/drivers/gpu/drm/amd/display/dc/link/link_dpms.c +++ b/drivers/gpu/drm/amd/display/dc/link/link_dpms.c @@ -1971,6 +1971,7 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx) bool is_vga_mode = (stream->timing.h_addressable == 640) && (stream->timing.v_addressable == 480); struct dc *dc = pipe_ctx->stream->ctx->dc; + const struct link_hwss *link_hwss = get_link_hwss(link, &pipe_ctx->link_res); if (stream->phy_pix_clk == 0) stream->phy_pix_clk = stream->timing.pix_clk_100hz / 10; @@ -2010,6 +2011,12 @@ static void enable_link_hdmi(struct pipe_ctx *pipe_ctx) if (stream->timing.pixel_encoding == PIXEL_ENCODING_YCBCR422) display_color_depth = COLOR_DEPTH_888; + /* We need to enable stream encoder for TMDS first to apply 1/4 TMDS + * character clock in case that beyond 340MHz. + */ + if (dc_is_hdmi_tmds_signal(pipe_ctx->stream->signal)) + link_hwss->setup_stream_encoder(pipe_ctx); + dc->hwss.enable_tmds_link_output( link, &pipe_ctx->link_res,