From: Hyung-Kyu Choi Date: Tue, 27 Jun 2017 05:48:33 +0000 (+0900) Subject: [RyuJIT/ARM32] Use helper for LSRA X-Git-Tag: submit/tizen/20210909.063632~11030^2~6925^2~341^2~1 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=1cae2798189707954cab11e835af8dd743e195db;p=platform%2Fupstream%2Fdotnet%2Fruntime.git [RyuJIT/ARM32] Use helper for LSRA Signed-off-by: Hyung-Kyu Choi Commit migrated from https://github.com/dotnet/coreclr/commit/e38a867f0c122c87f63e0064524ff61364e6d73a --- diff --git a/src/coreclr/src/jit/lsra.cpp b/src/coreclr/src/jit/lsra.cpp index b6117d2..a1dc240 100644 --- a/src/coreclr/src/jit/lsra.cpp +++ b/src/coreclr/src/jit/lsra.cpp @@ -6177,20 +6177,8 @@ void LinearScan::checkAndAssignInterval(RegRecord* regRec, Interval* interval) unassignPhysReg(regRec->regNum); } - regRec->assignedInterval = interval; -#ifdef _TARGET_ARM_ - // Update second RegRecord of double register - if ((interval->registerType == TYP_DOUBLE) && isFloatRegType(regRec->registerType)) - { - assert(genIsValidDoubleReg(regRec->regNum)); - - regNumber nextRegNum = REG_NEXT(regRec->regNum); - RegRecord* nextRegRec = getRegisterRecord(nextRegNum); - - nextRegRec->assignedInterval = interval; - } -#endif // _TARGET_ARM_ + updateAssignedInterval(regRec, interval, interval->registerType); } // Assign the given physical register interval to the given interval @@ -6392,20 +6380,7 @@ void LinearScan::checkAndClearInterval(RegRecord* regRec, RefPosition* spillRefP assert(spillRefPosition->getInterval() == assignedInterval); } - regRec->assignedInterval = nullptr; - -#ifdef _TARGET_ARM_ - // Update second RegRecord of double register - if ((assignedInterval->registerType == TYP_DOUBLE) && isFloatRegType(regRec->registerType)) - { - assert(genIsValidDoubleReg(regRec->regNum)); - - regNumber nextRegNum = REG_NEXT(regRec->regNum); - RegRecord* nextRegRec = getRegisterRecord(nextRegNum); - - nextRegRec->assignedInterval = nullptr; - } -#endif // _TARGET_ARM_ + updateAssignedInterval(regRec, nullptr, assignedInterval->registerType); } //------------------------------------------------------------------------