From: Rob Clark Date: Wed, 23 Nov 2016 14:46:15 +0000 (-0500) Subject: freedreno/ir3: add new helper for shader linkage X-Git-Tag: upstream/17.1.0~4196 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=1be5670c8de8fd0488ba7a6152860968b02121b4;p=platform%2Fupstream%2Fmesa.git freedreno/ir3: add new helper for shader linkage Helps simplify things on a5xx, where pos/psize get added to the vs-out map. And anyways, simplifies a3xx and a4xx. Signed-off-by: Rob Clark --- diff --git a/src/gallium/drivers/freedreno/ir3/ir3_shader.h b/src/gallium/drivers/freedreno/ir3/ir3_shader.h index 8c9483e..c46b452 100644 --- a/src/gallium/drivers/freedreno/ir3/ir3_shader.h +++ b/src/gallium/drivers/freedreno/ir3/ir3_shader.h @@ -31,6 +31,7 @@ #include "pipe/p_state.h" #include "compiler/shader_enums.h" +#include "util/bitscan.h" #include "ir3.h" #include "disasm.h" @@ -344,6 +345,52 @@ ir3_next_varying(const struct ir3_shader_variant *so, int i) return i; } +struct ir3_shader_linkage { + uint8_t max_loc; + uint8_t cnt; + struct { + uint8_t regid; + uint8_t compmask; + uint8_t loc; + } var[16]; +}; + +static inline void +ir3_link_add(struct ir3_shader_linkage *l, uint8_t regid, uint8_t compmask, uint8_t loc) +{ + int i = l->cnt++; + + debug_assert(i < ARRAY_SIZE(l->var)); + + l->var[i].regid = regid; + l->var[i].compmask = compmask; + l->var[i].loc = loc; + l->max_loc = MAX2(l->max_loc, loc + util_last_bit(compmask)); +} + +static inline void +ir3_link_shaders(struct ir3_shader_linkage *l, + const struct ir3_shader_variant *vs, + const struct ir3_shader_variant *fs) +{ + int j = -1, k; + + while (l->cnt < ARRAY_SIZE(l->var)) { + j = ir3_next_varying(fs, j); + + if (j >= fs->inputs_count) + break; + + if (fs->inputs[j].inloc >= fs->total_in) + continue; + + k = ir3_find_output(vs, fs->inputs[j].slot); + + ir3_link_add(l, vs->outputs[k].regid, + fs->inputs[j].compmask, fs->inputs[j].inloc); + } +} + static inline uint32_t ir3_find_output_regid(const struct ir3_shader_variant *so, unsigned slot) {