From: Richard Sandiford Date: Tue, 2 Dec 2008 22:33:06 +0000 (+0000) Subject: Sorry, committed the wrong version of the last patch. X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=1ba62f90e187e93b37d2bc88a818caa42ad51619;p=platform%2Fupstream%2Fgcc.git Sorry, committed the wrong version of the last patch. From-SVN: r142376 --- diff --git a/gcc/ChangeLog b/gcc/ChangeLog index ee967c6..6ee8dd8 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -5,7 +5,7 @@ * config/mips/mips.md (IMOVE32): New mode iterator. (movsi): Generalize with IMOVE32. (*movsi_internal): Likewise. - (*mov_mips16): Likewise, and its define_splits. + (*mov_mips16): Likewise. (*lwxs): Likewise. 2008-12-02 Nathan Sidwell diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index 698d57c..b9226c5 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -3985,9 +3985,9 @@ ;; load are 2 2 byte instructions. (define_split - [(set (match_operand:IMOVE32 0 "d_operand") - (mem:IMOVE32 (plus:SI (match_dup 0) - (match_operand:SI 1 "const_int_operand"))))] + [(set (match_operand:SI 0 "d_operand") + (mem:SI (plus:SI (match_dup 0) + (match_operand:SI 1 "const_int_operand"))))] "TARGET_MIPS16 && reload_completed && !TARGET_DEBUG_D_MODE && ((INTVAL (operands[1]) < 0 && INTVAL (operands[1]) >= -0x80) @@ -3996,8 +3996,8 @@ || (INTVAL (operands[1]) >= 0 && INTVAL (operands[1]) < 32 * 4 && (INTVAL (operands[1]) & 3) != 0))" - [(set (match_dup 3) (plus:SI (match_dup 0) (match_dup 1))) - (set (match_dup 0) (mem:IMOVE32 (plus:SI (match_dup 3) (match_dup 2))))] + [(set (match_dup 0) (plus:SI (match_dup 0) (match_dup 1))) + (set (match_dup 0) (mem:SI (plus:SI (match_dup 0) (match_dup 2))))] { HOST_WIDE_INT val = INTVAL (operands[1]); @@ -4017,7 +4017,6 @@ operands[1] = GEN_INT (off); operands[2] = GEN_INT (val - off); } - operands[3] = gen_rtx_REG (SImode, REGNO (operands[0])); }) ;; On the mips16, we can split a load of certain constants into a load