From: Lucas De Marchi <lucas.demarchi@intel.com>
Date: Thu, 5 May 2022 21:38:11 +0000 (-0700)
Subject: drm/i915/pvc: skip all copy engines from aux table invalidate
X-Git-Tag: v6.6.17~3937^2~16^2~839
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=1a1a5a315ee805bec457fd214250c088efadb50b;p=platform%2Fkernel%2Flinux-rpi.git

drm/i915/pvc: skip all copy engines from aux table invalidate

As we have more copy engines now, mask all of them from aux table
invalidate.

v2 (MattR):
 - Use I915_MAX_BCS to determine mask rather than hardcoding BCS8.
   (Prathap)

Cc: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
Reviewed-by: Prathap Kumar Valsan <prathap.kumar.valsan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220505213812.3979301-12-matthew.d.roper@intel.com
---

diff --git a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
index 3e13960..daa1a619 100644
--- a/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/gen8_engine_cs.c
@@ -272,7 +272,8 @@ int gen12_emit_flush_xcs(struct i915_request *rq, u32 mode)
 		if (!HAS_FLAT_CCS(rq->engine->i915) &&
 		    (rq->engine->class == VIDEO_DECODE_CLASS ||
 		     rq->engine->class == VIDEO_ENHANCEMENT_CLASS)) {
-			aux_inv = rq->engine->mask & ~BIT(BCS0);
+			aux_inv = rq->engine->mask &
+				~GENMASK(_BCS(I915_MAX_BCS - 1), BCS0);
 			if (aux_inv)
 				cmd += 4;
 		}