From: Alexandre Courbot Date: Wed, 29 Apr 2015 14:04:23 +0000 (+0900) Subject: drm/nouveau/gr/gf100: wait on bottom half of FE's pipeline X-Git-Tag: v4.2~115^2~3^2~9 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=19bf09cecfec1891069f1d5353a0298debd98713;p=platform%2Fkernel%2Flinux-amlogic.git drm/nouveau/gr/gf100: wait on bottom half of FE's pipeline When emitting the ICMD bundle, wait on the bottom half (bit 3 of the GR_STATUS register) instead of upper half (bit 2) to make sure methods are effectively emitted. Signed-off-by: Alexandre Courbot Signed-off-by: Ben Skeggs --- diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c index 5606c25..01efc2c 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/gf100.c @@ -699,7 +699,7 @@ gf100_gr_icmd(struct gf100_gr_priv *priv, const struct gf100_gr_pack *p) while (addr < next) { nv_wr32(priv, 0x400200, addr); - nv_wait(priv, 0x400700, 0x00000002, 0x00000000); + nv_wait(priv, 0x400700, 0x00000004, 0x00000000); addr += init->pitch; } }