From: Fabio Estevam Date: Thu, 20 Oct 2011 16:01:31 +0000 (+0000) Subject: qong: remove unneeded IOMUX settings X-Git-Tag: v2011.12-rc1~228^2~100 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=199222fcd280dc7abde193e0ba4a649c5cc32fbb;p=platform%2Fkernel%2Fu-boot.git qong: remove unneeded IOMUX settings On qong board some of the USBH2 pins are set via GPR register, so don need to setup the IOMUX for each pin individually. Other than that, these pins should not be configured as primary function because the primary function selects SSI functionality. Let GPR register do the work and remove the unneeded IOMUX setup. Signed-off-by: Fabio Estevam Acked-by: Stefano Babic --- diff --git a/board/davedenx/qong/qong.c b/board/davedenx/qong/qong.c index 3f6e0c2..665aedf 100644 --- a/board/davedenx/qong/qong.c +++ b/board/davedenx/qong/qong.c @@ -120,12 +120,6 @@ int board_early_init_f(void) mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_STP, MUX_CTL_FUNC)); mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_DATA0, MUX_CTL_FUNC)); mx31_gpio_mux(IOMUX_MODE(MUX_CTL_USBH2_DATA1, MUX_CTL_FUNC)); - mx31_gpio_mux(IOMUX_MODE(MUX_CTL_STXD3, MUX_CTL_FUNC)); - mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SRXD3, MUX_CTL_FUNC)); - mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SCK3, MUX_CTL_FUNC)); - mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SFS3, MUX_CTL_FUNC)); - mx31_gpio_mux(IOMUX_MODE(MUX_CTL_STXD6, MUX_CTL_FUNC)); - mx31_gpio_mux(IOMUX_MODE(MUX_CTL_SRXD6, MUX_CTL_FUNC)); #define H2_PAD_CFG (PAD_CTL_DRV_MAX | PAD_CTL_SRE_FAST | PAD_CTL_HYS_CMOS | \ PAD_CTL_ODE_CMOS | PAD_CTL_100K_PU)