From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Date: Thu, 7 Sep 2017 23:00:37 +0000 (-0700)
Subject: drm/i915/psr: Move hsw_enable_source after enabling sink.
X-Git-Tag: v4.19~298^2~46^2~1640
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=196cebddde80dd06b2de557ea393082bf5a06c3d;p=platform%2Fkernel%2Flinux-rpi.git

drm/i915/psr: Move hsw_enable_source after enabling sink.

No functional change is expected here since at this point
PSR is not allowed to go to any active state. In other
words, not really enabled.

However let's do in a separated patch so it gets clear
on what is change and specially it can helps on bisect
case if we figure something has caused changes in behaviour.

But this needs to be done before we make the vfunc to
enable source to be in parity with VLV implementation.

Cc: Jani Nikula <jani.nikula@intel.com>
Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Cc: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Cc: Vathsala Nagaraju <vathsala.nagaraju@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Dhinakaran Pandiyan <dhinakaran.pandiyan@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20170907230041.22978-8-rodrigo.vivi@intel.com
---

diff --git a/drivers/gpu/drm/i915/intel_psr.c b/drivers/gpu/drm/i915/intel_psr.c
index 575c8b9..245cf3e 100644
--- a/drivers/gpu/drm/i915/intel_psr.c
+++ b/drivers/gpu/drm/i915/intel_psr.c
@@ -544,11 +544,11 @@ void intel_psr_enable(struct intel_dp *intel_dp,
 
 		hsw_psr_setup_vsc(intel_dp, crtc_state);
 
-		hsw_psr_enable_source(intel_dp, crtc_state);
-
 		/* Enable PSR on the panel */
 		hsw_psr_enable_sink(intel_dp);
 
+		hsw_psr_enable_source(intel_dp, crtc_state);
+
 		if (INTEL_GEN(dev_priv) >= 9)
 			intel_psr_activate(intel_dp);
 	} else {