From: Renato Golin <renato.golin@linaro.org>
Date: Sat, 23 Apr 2016 19:30:52 +0000 (+0000)
Subject: Revert "[AArch64] Fix optimizeCondBranch logic."
X-Git-Tag: llvmorg-3.9.0-rc1~8174
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=179d1f5dadbbd4a338ea7c5954bb917ca043b99b;p=platform%2Fupstream%2Fllvm.git

Revert "[AArch64] Fix optimizeCondBranch logic."

This reverts commit r267206, as it broke self-hosting on AArch64.

llvm-svn: 267294
---

diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 95037a4..eb0c578 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -3353,9 +3353,9 @@ bool AArch64InstrInfo::optimizeCondBranch(MachineInstr *MI) const {
     if (!MRI->hasOneNonDBGUse(VReg))
       return false;
 
-    bool Is64Bit = DefMI->getOpcode() != AArch64::ANDWri;
     uint64_t Mask = AArch64_AM::decodeLogicalImmediate(
-        DefMI->getOperand(2).getImm(), Is64Bit ? 64 : 32);
+        DefMI->getOperand(2).getImm(),
+        (DefMI->getOpcode() == AArch64::ANDWri) ? 32 : 64);
     if (!isPowerOf2_64(Mask))
       return false;
 
@@ -3370,9 +3370,9 @@ bool AArch64InstrInfo::optimizeCondBranch(MachineInstr *MI) const {
     MachineBasicBlock *TBB = MI->getOperand(1).getMBB();
     DebugLoc DL = MI->getDebugLoc();
     unsigned Imm = Log2_64(Mask);
-    unsigned Opc = Is64Bit
-                       ? (IsNegativeBranch ? AArch64::TBNZX : AArch64::TBZX)
-                       : (IsNegativeBranch ? AArch64::TBNZW : AArch64::TBZW);
+    unsigned Opc = (Imm < 32)
+                       ? (IsNegativeBranch ? AArch64::TBNZW : AArch64::TBZW)
+                       : (IsNegativeBranch ? AArch64::TBNZX : AArch64::TBZX);
     BuildMI(RefToMBB, MI, DL, get(Opc)).addReg(NewReg).addImm(Imm).addMBB(TBB);
     MI->eraseFromParent();
     return true;
diff --git a/llvm/test/CodeGen/AArch64/aarch64-tbz.ll b/llvm/test/CodeGen/AArch64/aarch64-tbz.ll
index a569445..e24f2d9 100644
--- a/llvm/test/CodeGen/AArch64/aarch64-tbz.ll
+++ b/llvm/test/CodeGen/AArch64/aarch64-tbz.ll
@@ -1,4 +1,4 @@
-; RUN: llc -verify-machineinstrs -mtriple=aarch64-linux-gnueabi < %s | FileCheck %s
+; RUN: llc -mtriple=aarch64-linux-gnueabi < %s | FileCheck %s
 
 ; CHECK-LABEL: test1
 ; CHECK: tbz {{w[0-9]}}, #3, {{.LBB0_3}}