From: Andrea Corallo Date: Mon, 28 Nov 2022 16:04:41 +0000 (+0100) Subject: arm: improve tests and fix vclzq* X-Git-Tag: upstream/13.1.0~1894 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=16452c63e10f7a44c70bec0216358ac405abfcf6;p=platform%2Fupstream%2Fgcc.git arm: improve tests and fix vclzq* gcc/ChangeLog: * config/arm/mve.md (@mve_vclzq_s): Fix spacing. gcc/testsuite/ChangeLog: * gcc.target/arm/mve/intrinsics/vclzq_m_s16.c: Use check-function-bodies instead of scan-assembler checks. Use extern "C" for C++ testing. * gcc.target/arm/mve/intrinsics/vclzq_m_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_m_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_m_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_m_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_m_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_u8.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_x_s16.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_x_s32.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_x_s8.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_x_u16.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_x_u32.c: Likewise. * gcc.target/arm/mve/intrinsics/vclzq_x_u8.c: Likewise. * gcc.target/arm/simd/mve-vclz.c: Update test. --- diff --git a/gcc/config/arm/mve.md b/gcc/config/arm/mve.md index d4f5a90..2728537 100644 --- a/gcc/config/arm/mve.md +++ b/gcc/config/arm/mve.md @@ -448,7 +448,7 @@ (clz:MVE_2 (match_operand:MVE_2 1 "s_register_operand" "w"))) ] "TARGET_HAVE_MVE" - "vclz.i%# %q0, %q1" + "vclz.i%#\t%q0, %q1" [(set_attr "type" "mve_move") ]) (define_expand "mve_vclzq_u" diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c index 9670f8f..620314e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vclzq_m_s16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t inactive, int16x8_t a, mve_pred16_t p) { return vclzq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c index 1842735..dfda1e67 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vclzq_m_s32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t inactive, int32x4_t a, mve_pred16_t p) { return vclzq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c index 2697d03..1300fe6 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vclzq_m_s8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t inactive, int8x16_t a, mve_pred16_t p) { return vclzq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c index 8405b16..922819d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vclzq_m_u16 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t inactive, uint16x8_t a, mve_pred16_t p) { return vclzq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c index 350e6e7..6e75a04 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vclzq_m_u32 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t inactive, uint32x4_t a, mve_pred16_t p) { return vclzq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c index d455526..3c450e8 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_m_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vclzq_m_u8 (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t inactive, uint8x16_t a, mve_pred16_t p) { return vclzq_m (inactive, a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c index f71a0a4..17be53f 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s16.c @@ -1,21 +1,41 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a) { return vclzq_s16 (a); } -/* { dg-final { scan-assembler "vclz.i16" } } */ +/* +**foo1: +** ... +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a) { return vclzq (a); } -/* { dg-final { scan-assembler "vclz.i16" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c index 46a002b..5e440fe 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s32.c @@ -1,21 +1,41 @@ -/* { dg-require-effective-target arm_v8_1m_mve_fp_ok } */ -/* { dg-add-options arm_v8_1m_mve_fp } */ +/* { dg-require-effective-target arm_v8_1m_mve_ok } */ +/* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a) { return vclzq_s32 (a); } -/* { dg-final { scan-assembler "vclz.i32" } } */ +/* +**foo1: +** ... +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a) { return vclzq (a); } -/* { dg-final { scan-assembler "vclz.i32" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c index 3cab6f3..9eaa9a4 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_s8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a) { return vclzq_s8 (a); } -/* { dg-final { scan-assembler "vclz.i8" } } */ +/* +**foo1: +** ... +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a) { return vclzq (a); } -/* { dg-final { scan-assembler "vclz.i8" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c index cada68b..37179b2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u16.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a) { - return vclzq_u16 (a); + return vclzq_u16 (a); } -/* { dg-final { scan-assembler "vclz.i16" } } */ +/* +**foo1: +** ... +** vclz.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a) { - return vclzq (a); + return vclzq (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vclz.i16" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c index 0291b0c..65ee44d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u32.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a) { - return vclzq_u32 (a); + return vclzq_u32 (a); } -/* { dg-final { scan-assembler "vclz.i32" } } */ +/* +**foo1: +** ... +** vclz.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a) { - return vclzq (a); + return vclzq (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vclz.i32" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c index 5eb7bab..bed4ab1 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_u8.c @@ -1,21 +1,41 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a) { - return vclzq_u8 (a); + return vclzq_u8 (a); } -/* { dg-final { scan-assembler "vclz.i8" } } */ +/* +**foo1: +** ... +** vclz.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a) { - return vclzq (a); + return vclzq (a); +} + +#ifdef __cplusplus } +#endif -/* { dg-final { scan-assembler "vclz.i8" } } */ +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c index daddd1b..ea78bf2 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo (int16x8_t a, mve_pred16_t p) { return vclzq_x_s16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int16x8_t foo1 (int16x8_t a, mve_pred16_t p) { return vclzq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c index d4f443f..cc85d4d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo (int32x4_t a, mve_pred16_t p) { return vclzq_x_s32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int32x4_t foo1 (int32x4_t a, mve_pred16_t p) { return vclzq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c index b33d2c5..0f80916 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_s8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo (int8x16_t a, mve_pred16_t p) { return vclzq_x_s8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ int8x16_t foo1 (int8x16_t a, mve_pred16_t p) { return vclzq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c index 6d9bc79..a9b662d 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u16.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo (uint16x8_t a, mve_pred16_t p) { return vclzq_x_u16 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i16" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i16 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint16x8_t foo1 (uint16x8_t a, mve_pred16_t p) { return vclzq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c index c3b053b..5446938 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u32.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo (uint32x4_t a, mve_pred16_t p) { return vclzq_x_u32 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i32" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i32 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint32x4_t foo1 (uint32x4_t a, mve_pred16_t p) { return vclzq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c index 678b2eb..548a74e 100644 --- a/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c +++ b/gcc/testsuite/gcc.target/arm/mve/intrinsics/vclzq_x_u8.c @@ -1,22 +1,49 @@ /* { dg-require-effective-target arm_v8_1m_mve_ok } */ /* { dg-add-options arm_v8_1m_mve } */ /* { dg-additional-options "-O2" } */ +/* { dg-final { check-function-bodies "**" "" } } */ #include "arm_mve.h" +#ifdef __cplusplus +extern "C" { +#endif + +/* +**foo: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo (uint8x16_t a, mve_pred16_t p) { return vclzq_x_u8 (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ -/* { dg-final { scan-assembler "vclzt.i8" } } */ +/* +**foo1: +** ... +** vmsr p0, (?:ip|fp|r[0-9]+)(?: @.*|) +** ... +** vpst(?: @.*|) +** ... +** vclzt.i8 q[0-9]+, q[0-9]+(?: @.*|) +** ... +*/ uint8x16_t foo1 (uint8x16_t a, mve_pred16_t p) { return vclzq_x (a, p); } -/* { dg-final { scan-assembler "vpst" } } */ +#ifdef __cplusplus +} +#endif + +/* { dg-final { scan-assembler-not "__ARM_undef" } } */ \ No newline at end of file diff --git a/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c b/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c index 7068736..38e91fc 100644 --- a/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c +++ b/gcc/testsuite/gcc.target/arm/simd/mve-vclz.c @@ -23,6 +23,6 @@ FUNC(u, uint, 8, clz) /* 16 and 8-bit versions are not vectorized because they need pack/unpack patterns since __builtin_clz uses 32-bit parameter and return value. */ -/* { dg-final { scan-assembler-times {vclz\.i32 q[0-9]+, q[0-9]+} 2 } } */ -/* { dg-final { scan-assembler-times {vclz\.i16 q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */ -/* { dg-final { scan-assembler-times {vclz\.i8 q[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times {vclz\.i32\tq[0-9]+, q[0-9]+} 2 } } */ +/* { dg-final { scan-assembler-times {vclz\.i16\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */ +/* { dg-final { scan-assembler-times {vclz\.i8\tq[0-9]+, q[0-9]+} 2 { xfail *-*-* } } } */