From: Gayatri Kammela Date: Fri, 24 Jan 2020 18:59:28 +0000 (-0800) Subject: platform/x86: intel_pmc_core: Add Atom based Jasper Lake (JSL) platform support X-Git-Tag: v5.10.7~2948^2~73 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=16292bed9c56a20715d942fd5d9e025f01fa65fe;p=platform%2Fkernel%2Flinux-rpi.git platform/x86: intel_pmc_core: Add Atom based Jasper Lake (JSL) platform support Add Jasper Lake to the list of the platforms that intel_pmc_core driver supports for pmc_core device. Just like Ice Lake, Tiger Lake and Elkhart Lake, Jasper Lake can also reuse all the Cannon Lake PCH IPs. Also, it uses the same PCH IPs of Tiger Lake, no additional effort is needed to enable but to simply reuse them. Cc: Srinivas Pandruvada Cc: Andy Shevchenko Cc: David Box Signed-off-by: Gayatri Kammela Signed-off-by: Andy Shevchenko --- diff --git a/drivers/platform/x86/intel_pmc_core.c b/drivers/platform/x86/intel_pmc_core.c index 144faa8..f85c112 100644 --- a/drivers/platform/x86/intel_pmc_core.c +++ b/drivers/platform/x86/intel_pmc_core.c @@ -193,7 +193,7 @@ static const struct pmc_bit_map cnp_pfear_map[] = { {"Fuse", BIT(6)}, /* * Reserved for Cannon Lake but valid for Ice Lake, Comet Lake, - * Tiger Lake and Elkhart Lake. + * Tiger Lake, Elkhart Lake and Jasper Lake. */ {"SBR8", BIT(7)}, @@ -240,7 +240,7 @@ static const struct pmc_bit_map cnp_pfear_map[] = { {"HDA_PGD6", BIT(4)}, /* * Reserved for Cannon Lake but valid for Ice Lake, Comet Lake, - * Tiger Lake and ELkhart Lake. + * Tiger Lake, ELkhart Lake and Jasper Lake. */ {"PSF6", BIT(5)}, {"PSF7", BIT(6)}, @@ -273,7 +273,7 @@ static const struct pmc_bit_map *ext_icl_pfear_map[] = { }; static const struct pmc_bit_map tgl_pfear_map[] = { - /* Tiger Lake and Elkhart Lake generation onwards only */ + /* Tiger Lake, Elkhart Lake and Jasper Lake generation onwards only */ {"PSF9", BIT(0)}, {"RES_66", BIT(1)}, {"RES_67", BIT(2)}, @@ -883,6 +883,7 @@ static const struct x86_cpu_id intel_pmc_core_ids[] = { INTEL_CPU_FAM6(TIGERLAKE_L, tgl_reg_map), INTEL_CPU_FAM6(TIGERLAKE, tgl_reg_map), INTEL_CPU_FAM6(ATOM_TREMONT, tgl_reg_map), + INTEL_CPU_FAM6(ATOM_TREMONT_L, tgl_reg_map), {} };