From: SooChan Lim <sc1.lim@samsung.com>
Date: Mon, 19 Mar 2018 11:38:19 +0000 (+0900)
Subject: re-arrange the static functions.
X-Git-Tag: submit/tizen/20180320.042059~2
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=1591f0b387c932c0243f2efd1307492c5cbb8df5;p=platform%2Fadaptation%2Fsamsung_exynos%2Flibtbm-exynos.git

re-arrange the static functions.

Change-Id: I1f4a1ef1556f8c53a04231b90c76a252972afca0
---

diff --git a/src/tbm_bufmgr_exynos.c b/src/tbm_bufmgr_exynos.c
index a528361..e9bdb79 100644
--- a/src/tbm_bufmgr_exynos.c
+++ b/src/tbm_bufmgr_exynos.c
@@ -57,13 +57,13 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #define USE_DMAIMPORT
 #define TBM_COLOR_FORMAT_COUNT 4
 
-#define EXYNOS_DRM_NAME "exynos"
-
 #ifdef DEBUG
 #define LOG_TAG	"TBM_BACKEND"
 #include <dlog.h>
 static int bDebug;
 
+#define EXYNOS_DRM_NAME "exynos"
+
 char *target_name()
 {
 	static char app_name[128] = {0, };
@@ -1012,1207 +1012,1206 @@ _exynos_bo_handle(tbm_bo_exynos bo_exynos, int device)
 }
 
 static int
-tbm_exynos_bo_get_size(tbm_backend_bo_data *bo_data, tbm_error_e *error)
+_new_calc_plane_nv12(int width, int height)
 {
-	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+	int mbX, mbY;
 
-	if (!bo_exynos) {
-		if (error)
-			*error = TBM_ERROR_INVALID_PARAMETER;
-		return 0;
-	}
+	mbX = DIV_ROUND_UP(width, S5P_FIMV_NUM_PIXELS_IN_MB_ROW);
+	mbY = DIV_ROUND_UP(height, S5P_FIMV_NUM_PIXELS_IN_MB_COL);
 
-	if (error)
-		*error = TBM_ERROR_NONE;
+	if (width * height < S5P_FIMV_MAX_FRAME_SIZE)
+		mbY = (mbY + 1) / 2 * 2;
 
-	return bo_exynos->size;
+	return ((mbX * S5P_FIMV_NUM_PIXELS_IN_MB_COL) * (mbY *
+			S5P_FIMV_NUM_PIXELS_IN_MB_ROW));
 }
 
-static tbm_backend_bo_data *
-tbm_exynos_bufmgr_alloc_bo(tbm_backend_bufmgr_data *bufmgr_data, int size, tbm_bo_memory_type flags, tbm_error_e *error)
+static int
+_calc_yplane_nv12(int width, int height)
 {
-	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
-	tbm_bo_exynos bo_exynos;
-	unsigned int exynos_flags;
-
-	if (bufmgr_exynos == NULL) {
-		TBM_EXYNOS_ERROR("bufmgr_data is null\n");
-		if (error)
-			*error = TBM_ERROR_INVALID_PARAMETER;
-		return NULL;
-	}
-
-	bo_exynos = calloc(1, sizeof(struct _tbm_bo_exynos));
-	if (!bo_exynos) {
-		TBM_EXYNOS_ERROR("fail to allocate the bo_exynos private\n");
-		if (error)
-			*error = TBM_ERROR_OUT_OF_MEMORY;
-		return NULL;
-	}
-	bo_exynos->bufmgr_exynos = bufmgr_exynos;
-
-	exynos_flags = _get_exynos_flag_from_tbm(flags);
-	if ((flags & TBM_BO_SCANOUT) &&
-	    size <= 4 * 1024) {
-		exynos_flags |= EXYNOS_BO_NONCONTIG;
-	}
+	int mbX, mbY;
 
-	struct drm_exynos_gem_create arg = {0, };
+	mbX = SIZE_ALIGN(width + 24, S5P_FIMV_NV12MT_HALIGN);
+	mbY = SIZE_ALIGN(height + 16, S5P_FIMV_NV12MT_VALIGN);
 
-	arg.size = (uint64_t)size;
-	arg.flags = exynos_flags;
-	if (drmCommandWriteRead(bufmgr_exynos->fd, DRM_EXYNOS_GEM_CREATE, &arg,
-				sizeof(arg))) {
-		TBM_EXYNOS_ERROR("Cannot create bo_exynos(flag:%x, size:%d)\n", arg.flags,
-			       (unsigned int)arg.size);
-		free(bo_exynos);
-		if (error)
-			*error = TBM_ERROR_OPERATION_FAILED;
-		return NULL;
-	}
+	return SIZE_ALIGN(mbX * mbY, S5P_FIMV_DEC_BUF_ALIGN);
+}
 
-	bo_exynos->fd = bufmgr_exynos->fd;
-	bo_exynos->gem = arg.handle;
-	bo_exynos->size = size;
-	bo_exynos->flags_tbm = flags;
-	bo_exynos->flags_exynos = exynos_flags;
-	bo_exynos->name = _get_name(bo_exynos->fd, bo_exynos->gem);
+static int
+_calc_uvplane_nv12(int width, int height)
+{
+	int mbX, mbY;
 
-	if (!_bo_init_cache_state(bufmgr_exynos, bo_exynos, 0)) {
-		TBM_EXYNOS_ERROR("fail init cache state(%d)\n", bo_exynos->name);
-		free(bo_exynos);
-		if (error)
-			*error = TBM_ERROR_OPERATION_FAILED;
-		return NULL;
-	}
+	mbX = SIZE_ALIGN(width + 16, S5P_FIMV_NV12MT_HALIGN);
+	mbY = SIZE_ALIGN(height + 4, S5P_FIMV_NV12MT_VALIGN);
 
-	pthread_mutex_init(&bo_exynos->mutex, NULL);
+	return SIZE_ALIGN((mbX * mbY) >> 1, S5P_FIMV_DEC_BUF_ALIGN);
+}
 
-	if (bufmgr_exynos->use_dma_fence && !bo_exynos->dmabuf) {
-		struct drm_prime_handle arg = {0, };
+static int
+_new_calc_yplane_nv12(int width, int height)
+{
+	return SIZE_ALIGN(_new_calc_plane_nv12(width,
+						height) + S5P_FIMV_D_ALIGN_PLANE_SIZE,
+			   TBM_SURFACE_ALIGNMENT_PLANE_NV12);
+}
 
-		arg.handle = bo_exynos->gem;
-		if (drmIoctl(bo_exynos->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg)) {
-			TBM_EXYNOS_ERROR("Cannot dmabuf=%d\n", bo_exynos->gem);
-			free(bo_exynos);
-			if (error)
-				*error = TBM_ERROR_OPERATION_FAILED;
-			return NULL;
-		}
-		bo_exynos->dmabuf = arg.fd;
-	}
+static int
+_new_calc_uvplane_nv12(int width, int height)
+{
+	return SIZE_ALIGN((_new_calc_plane_nv12(width,
+						height) >> 1) + S5P_FIMV_D_ALIGN_PLANE_SIZE,
+			  TBM_SURFACE_ALIGNMENT_PLANE_NV12);
+}
 
-	/* add bo_exynos to hash */
-	if (drmHashInsert(bufmgr_exynos->hashBos, bo_exynos->name, (void *)bo_exynos) < 0)
-		TBM_EXYNOS_ERROR("Cannot insert bo_exynos to Hash(%d)\n", bo_exynos->name);
+static tbm_bufmgr_capability
+tbm_exynos_bufmgr_get_capabilities(tbm_backend_bufmgr_data *bufmgr_data, tbm_error_e *error)
+{
+	tbm_bufmgr_capability capabilities = TBM_BUFMGR_CAPABILITY_NONE;
 
-	TBM_EXYNOS_DEBUG("     bo_exynos:%p, gem:%d(%d), flags:%d(%d), size:%d\n",
-		bo_exynos,
-		bo_exynos->gem, bo_exynos->name,
-		flags, exynos_flags,
-		bo_exynos->size);
+	capabilities = TBM_BUFMGR_CAPABILITY_SHARE_KEY|TBM_BUFMGR_CAPABILITY_SHARE_FD;
 
 	if (error)
 		*error = TBM_ERROR_NONE;
 
-	return (tbm_backend_bo_data *)bo_exynos;
+	return capabilities;
 }
 
-static void
-tbm_exynos_bo_free(tbm_backend_bo_data *bo_data)
+static tbm_error_e
+tbm_exynos_bufmgr_bind_native_display(tbm_backend_bufmgr_data *bufmgr_data, tbm_native_display *native_display)
 {
-	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
-	tbm_bo_exynos temp;
-	tbm_bufmgr_exynos bufmgr_exynos;
-	char buf[STRERR_BUFSIZE];
-	int ret;
-
-	if (!bo_data)
-		return;
+	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
+	EXYNOS_RETURN_VAL_IF_FAIL(bufmgr_exynos != NULL, TBM_ERROR_INVALID_PARAMETER);
 
-	bufmgr_exynos = bo_exynos->bufmgr_exynos;
-	if (!bufmgr_exynos)
-		return;
+	if (!tbm_drm_helper_wl_auth_server_init(native_display, bufmgr_exynos->fd,
+					   bufmgr_exynos->device_name, 0)) {
+		TBM_EXYNOS_ERROR("fail to tbm_drm_helper_wl_server_init\n");
+		return TBM_ERROR_OPERATION_FAILED;
+	}
 
-	TBM_EXYNOS_DEBUG("      bo_exynos:%p, gem:%d(%d), fd:%d, size:%d\n",
-	    bo_exynos,
-	    bo_exynos->gem, bo_exynos->name,
-	    bo_exynos->dmabuf,
-	    bo_exynos->size);
+	bufmgr_exynos->bind_display = native_display;
 
-	if (bo_exynos->pBase) {
-		if (munmap(bo_exynos->pBase, bo_exynos->size) == -1) {
-			TBM_EXYNOS_ERROR("bo_exynos:%p fail to munmap(%s)\n",
-				       bo_exynos, strerror_r(errno, buf, STRERR_BUFSIZE));
-		}
-	}
+	return TBM_ERROR_NONE;
+}
 
-	/* close dmabuf */
-	if (bo_exynos->dmabuf) {
-		close(bo_exynos->dmabuf);
-		bo_exynos->dmabuf = 0;
-	}
+static tbm_error_e
+tbm_exynos_bufmgr_get_supported_formats(tbm_backend_bufmgr_data *bufmgr_data,
+							uint32_t **formats, uint32_t *num)
+{
+	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
+	uint32_t *color_formats;
 
-	/* delete bo_exynos from hash */
-	ret = drmHashLookup(bufmgr_exynos->hashBos, bo_exynos->name, (void **)&temp);
-	if (ret == 0)
-		drmHashDelete(bufmgr_exynos->hashBos, bo_exynos->name);
-	else
-		TBM_EXYNOS_ERROR("Cannot find bo_exynos to Hash(%d), ret=%d\n", bo_exynos->name, ret);
+	EXYNOS_RETURN_VAL_IF_FAIL(bufmgr_exynos != NULL, TBM_ERROR_INVALID_PARAMETER);
 
-	if (temp != bo_exynos)
-		TBM_EXYNOS_ERROR("hashBos probably has several BOs with same name!!!\n");
+	color_formats = (uint32_t *)calloc(1, sizeof(uint32_t) * TBM_COLOR_FORMAT_COUNT);
+	if (color_formats == NULL)
+		return TBM_ERROR_OUT_OF_MEMORY;
 
-	_bo_destroy_cache_state(bufmgr_exynos, bo_exynos);
+	memcpy(color_formats, tbm_exynos_color_format_list, sizeof(uint32_t)*TBM_COLOR_FORMAT_COUNT);
 
-	/* Free gem handle */
-	struct drm_gem_close arg = {0, };
+	*formats = color_formats;
+	*num = TBM_COLOR_FORMAT_COUNT;
 
-	memset(&arg, 0, sizeof(arg));
-	arg.handle = bo_exynos->gem;
-	if (drmIoctl(bo_exynos->fd, DRM_IOCTL_GEM_CLOSE, &arg))
-		TBM_EXYNOS_ERROR("bo_exynos:%p fail to gem close.(%s)\n",
-			       bo_exynos, strerror_r(errno, buf, STRERR_BUFSIZE));
+	TBM_EXYNOS_DEBUG("supported format count = %d\n", *num);
 
-	free(bo_exynos);
+	return TBM_ERROR_NONE;
 }
 
-static tbm_backend_bo_data *
-tbm_exynos_bufmgr_import_key(tbm_backend_bufmgr_data *bufmgr_data, tbm_key key, tbm_error_e *error)
+static tbm_error_e
+tbm_exynos_bufmgr_get_plane_data(tbm_backend_bufmgr_data *bufmgr_data,
+							tbm_format format, int plane_idx, int width,
+							int height, uint32_t *size, uint32_t *offset,
+							uint32_t *pitch, int *bo_idx)
 {
 	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
-	tbm_bo_exynos bo_exynos;
-	int ret;
-
-	if (bufmgr_exynos == NULL) {
-		TBM_EXYNOS_ERROR("bufmgr_data is null\n");
-		if (error)
-			*error = TBM_ERROR_INVALID_PARAMETER;
-		return NULL;
-	}
-
-	ret = drmHashLookup(bufmgr_exynos->hashBos, key, (void **)&bo_exynos);
-	if (ret == 0) {
-		if (error)
-			*error = TBM_ERROR_NONE;
-		return (tbm_backend_bo_data *)bo_exynos;
-	}
-
-	struct drm_gem_open arg = {0, };
-	struct drm_exynos_gem_info info = {0, };
-
-	arg.name = key;
-	if (drmIoctl(bufmgr_exynos->fd, DRM_IOCTL_GEM_OPEN, &arg)) {
-		TBM_EXYNOS_ERROR("Cannot open gem name=%d\n", key);
-		if (error)
-			*error = TBM_ERROR_OPERATION_FAILED;
-		return NULL;
-	}
+	int bpp;
+	int _offset = 0;
+	int _pitch = 0;
+	int _size = 0;
+	int _bo_idx = 0;
 
-	info.handle = arg.handle;
-	if (drmCommandWriteRead(bufmgr_exynos->fd,
-				DRM_EXYNOS_GEM_GET,
-				&info,
-				sizeof(struct drm_exynos_gem_info))) {
-		TBM_EXYNOS_ERROR("Cannot get gem info=%d\n", key);
-		if (error)
-			*error = TBM_ERROR_OPERATION_FAILED;
-		return NULL;
-	}
+	EXYNOS_RETURN_VAL_IF_FAIL(bufmgr_exynos != NULL, TBM_ERROR_INVALID_PARAMETER);
 
-	bo_exynos = calloc(1, sizeof(struct _tbm_bo_exynos));
-	if (!bo_exynos) {
-		TBM_EXYNOS_ERROR("fail to allocate the bo_exynos private\n");
-		if (error)
-			*error = TBM_ERROR_OUT_OF_MEMORY;
-		return NULL;
-	}
-	bo_exynos->bufmgr_exynos = bufmgr_exynos;
-
-	bo_exynos->fd = bufmgr_exynos->fd;
-	bo_exynos->gem = arg.handle;
-	bo_exynos->size = arg.size;
-	bo_exynos->flags_exynos = info.flags;
-	bo_exynos->name = key;
-	bo_exynos->flags_tbm = _get_tbm_flag_from_exynos(bo_exynos->flags_exynos);
-
-	if (!_bo_init_cache_state(bufmgr_exynos, bo_exynos, 1)) {
-		TBM_EXYNOS_ERROR("fail init cache state(%d)\n", bo_exynos->name);
-		free(bo_exynos);
-		if (error)
-			*error = TBM_ERROR_OPERATION_FAILED;
-		return NULL;
-	}
+	switch (format) {
+		/* 16 bpp RGB */
+	case TBM_FORMAT_XRGB4444:
+	case TBM_FORMAT_XBGR4444:
+	case TBM_FORMAT_RGBX4444:
+	case TBM_FORMAT_BGRX4444:
+	case TBM_FORMAT_ARGB4444:
+	case TBM_FORMAT_ABGR4444:
+	case TBM_FORMAT_RGBA4444:
+	case TBM_FORMAT_BGRA4444:
+	case TBM_FORMAT_XRGB1555:
+	case TBM_FORMAT_XBGR1555:
+	case TBM_FORMAT_RGBX5551:
+	case TBM_FORMAT_BGRX5551:
+	case TBM_FORMAT_ARGB1555:
+	case TBM_FORMAT_ABGR1555:
+	case TBM_FORMAT_RGBA5551:
+	case TBM_FORMAT_BGRA5551:
+	case TBM_FORMAT_RGB565:
+		bpp = 16;
+		_offset = 0;
+		_pitch = SIZE_ALIGN((width * bpp) >> 3, g_tbm_surface_alignment_pitch_rgb);
+		_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+		_bo_idx = 0;
+		break;
+		/* 24 bpp RGB */
+	case TBM_FORMAT_RGB888:
+	case TBM_FORMAT_BGR888:
+		bpp = 24;
+		_offset = 0;
+		_pitch = SIZE_ALIGN((width * bpp) >> 3, g_tbm_surface_alignment_pitch_rgb);
+		_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+		_bo_idx = 0;
+		break;
+		/* 32 bpp RGB */
+	case TBM_FORMAT_XRGB8888:
+	case TBM_FORMAT_XBGR8888:
+	case TBM_FORMAT_RGBX8888:
+	case TBM_FORMAT_BGRX8888:
+	case TBM_FORMAT_ARGB8888:
+	case TBM_FORMAT_ABGR8888:
+	case TBM_FORMAT_RGBA8888:
+	case TBM_FORMAT_BGRA8888:
+		bpp = 32;
+		_offset = 0;
+		_pitch = SIZE_ALIGN((width * bpp) >> 3, g_tbm_surface_alignment_pitch_rgb);
+		_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+		_bo_idx = 0;
+		break;
 
-	if (!bo_exynos->dmabuf) {
-		struct drm_prime_handle arg = {0, };
+		/* packed YCbCr */
+	case TBM_FORMAT_YUYV:
+	case TBM_FORMAT_YVYU:
+	case TBM_FORMAT_UYVY:
+	case TBM_FORMAT_VYUY:
+	case TBM_FORMAT_AYUV:
+		bpp = 32;
+		_offset = 0;
+		_pitch = SIZE_ALIGN((width * bpp) >> 3, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+		_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+		_bo_idx = 0;
+		break;
 
-		arg.handle = bo_exynos->gem;
-		if (drmIoctl(bo_exynos->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg)) {
-			TBM_EXYNOS_ERROR("fail to DRM_IOCTL_PRIME_HANDLE_TO_FD gem=%d\n", bo_exynos->gem);
-			if (error)
-				*error = TBM_ERROR_OPERATION_FAILED;
-			free(bo_exynos);
-			return NULL;
+		/*
+		* 2 plane YCbCr
+		* index 0 = Y plane, [7:0] Y
+		* index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian
+		* or
+		* index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian
+		*/
+	case TBM_FORMAT_NV12:
+		bpp = 12;
+		if (plane_idx == 0) {
+			_offset = 0;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+			_size = MAX(_calc_yplane_nv12(width, height), _new_calc_yplane_nv12(width,
+					height));
+			_bo_idx = 0;
+		} else if (plane_idx == 1) {
+			_offset = 0;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+			_size = MAX(_calc_uvplane_nv12(width, height), _new_calc_uvplane_nv12(width,
+					height));
+			_bo_idx = 1;
 		}
-		bo_exynos->dmabuf = arg.fd;
-	}
-
-	/* add bo_exynos to hash */
-	if (drmHashInsert(bufmgr_exynos->hashBos, bo_exynos->name, (void *)bo_exynos) < 0)
-		TBM_EXYNOS_ERROR("Cannot insert bo_exynos to Hash(%d)\n", bo_exynos->name);
-
-	TBM_EXYNOS_DEBUG("    bo_exynos:%p, gem:%d(%d), fd:%d, flags:%d(%d), size:%d\n",
-	    bo_exynos,
-	    bo_exynos->gem, bo_exynos->name,
-	    bo_exynos->dmabuf,
-	    bo_exynos->flags_tbm, bo_exynos->flags_exynos,
-	    bo_exynos->size);
-
-	if (error)
-		*error = TBM_ERROR_NONE;
-
-	return (tbm_backend_bo_data *)bo_exynos;
-}
-
-static tbm_backend_bo_data *
-tbm_exynos_bufmgr_import_fd(tbm_backend_bufmgr_data *bufmgr_data, tbm_fd key, tbm_error_e *error)
-{
-	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
-	tbm_bo_exynos bo_exynos;
-	unsigned int gem = 0;
-	unsigned int name;
-	int ret;
-	char buf[STRERR_BUFSIZE];
-
-	if (bufmgr_exynos == NULL) {
-		TBM_EXYNOS_ERROR("bufmgr_data is null\n");
-		if (error)
-			*error = TBM_ERROR_INVALID_PARAMETER;
-		return NULL;
-	}
-
-	/*getting handle from fd*/
-	struct drm_prime_handle arg = {0, };
-
-	arg.fd = key;
-	arg.flags = 0;
-	if (drmIoctl(bufmgr_exynos->fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &arg)) {
-		TBM_EXYNOS_ERROR("Cannot get gem handle from fd:%d (%s)\n",
-			       arg.fd, strerror_r(errno, buf, STRERR_BUFSIZE));
-		if (error)
-			*error = TBM_ERROR_OPERATION_FAILED;
-		return NULL;
-	}
-	gem = arg.handle;
-
-	name = _get_name(bufmgr_exynos->fd, gem);
-	if (!name) {
-		TBM_EXYNOS_ERROR("Cannot get name from gem:%d, fd:%d (%s)\n",
-			       gem, key, strerror_r(errno, buf, STRERR_BUFSIZE));
-		if (error)
-			*error = TBM_ERROR_OPERATION_FAILED;
-		return NULL;
-	}
-
-	ret = drmHashLookup(bufmgr_exynos->hashBos, name, (void **)&bo_exynos);
-	if (ret == 0) {
-		if (gem == bo_exynos->gem) {
-			if (error)
-				*error = TBM_ERROR_NONE;
-			return bo_exynos;
+		break;
+	case TBM_FORMAT_NV21:
+		bpp = 12;
+		if (plane_idx == 0) {
+			_offset = 0;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+		} else if (plane_idx == 1) {
+			_offset = width * height;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
+			_size = SIZE_ALIGN(_pitch * (height / 2), g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
 		}
-	}
-
-	/* Determine size of bo_exynos.  The fd-to-handle ioctl really should
-	 * return the size, but it doesn't.  If we have kernel 3.12 or
-	 * later, we can lseek on the prime fd to get the size.  Older
-	 * kernels will just fail, in which case we fall back to the
-	 * provided (estimated or guess size).
-	 */
-	unsigned int real_size = -1;
-	struct drm_exynos_gem_info info = {0, };
-
-	real_size = lseek(key, 0, SEEK_END);
-
-	info.handle = gem;
-	if (drmCommandWriteRead(bufmgr_exynos->fd,
-				DRM_EXYNOS_GEM_GET,
-				&info,
-				sizeof(struct drm_exynos_gem_info))) {
-		TBM_EXYNOS_ERROR("Cannot get gem info from gem:%d, fd:%d (%s)\n",
-			       gem, key, strerror_r(errno, buf, STRERR_BUFSIZE));
-		if (error)
-			*error = TBM_ERROR_OPERATION_FAILED;
-		return NULL;
-	}
+		break;
 
-	if (real_size == -1)
-		real_size = info.size;
+	case TBM_FORMAT_NV16:
+	case TBM_FORMAT_NV61:
+		bpp = 16;
+		/*if(plane_idx == 0)*/
+		{
+			_offset = 0;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+			if (plane_idx == 0)
+				break;
+		}
+		/*else if( plane_idx ==1 )*/
+		{
+			_offset += _size;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
+			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+		}
+		break;
 
-	bo_exynos = calloc(1, sizeof(struct _tbm_bo_exynos));
-	if (!bo_exynos) {
-		TBM_EXYNOS_ERROR("bo_exynos:%p fail to allocate the bo_exynos\n", bo_exynos);
-		if (error)
-			*error = TBM_ERROR_OUT_OF_MEMORY;
-		return NULL;
-	}
-	bo_exynos->bufmgr_exynos = bufmgr_exynos;
+		/*
+		* 3 plane YCbCr
+		* index 0: Y plane, [7:0] Y
+		* index 1: Cb plane, [7:0] Cb
+		* index 2: Cr plane, [7:0] Cr
+		* or
+		* index 1: Cr plane, [7:0] Cr
+		* index 2: Cb plane, [7:0] Cb
+		*/
 
-	bo_exynos->fd = bufmgr_exynos->fd;
-	bo_exynos->gem = gem;
-	bo_exynos->size = real_size;
-	bo_exynos->flags_exynos = info.flags;
-	bo_exynos->flags_tbm = _get_tbm_flag_from_exynos(bo_exynos->flags_exynos);
-	bo_exynos->name = name;
+		/*
+		* NATIVE_BUFFER_FORMAT_YV12
+		* NATIVE_BUFFER_FORMAT_I420
+		*/
+	case TBM_FORMAT_YUV410:
+	case TBM_FORMAT_YVU410:
+		bpp = 9;
+		/*if(plane_idx == 0)*/
+		{
+			_offset = 0;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+			if (plane_idx == 0)
+				break;
+		}
+		/*else if(plane_idx == 1)*/
+		{
+			_offset += _size;
+			_pitch = SIZE_ALIGN(width / 4, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 4);
+			_size = SIZE_ALIGN(_pitch * (height / 4), g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+			if (plane_idx == 1)
+				break;
+		}
+		/*else if (plane_idx == 2)*/
+		{
+			_offset += _size;
+			_pitch = SIZE_ALIGN(width / 4, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 4);
+			_size = SIZE_ALIGN(_pitch * (height / 4), g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+		}
+		break;
+	case TBM_FORMAT_YUV411:
+	case TBM_FORMAT_YVU411:
+	case TBM_FORMAT_YUV420:
+	case TBM_FORMAT_YVU420:
+		bpp = 12;
+		/*if(plane_idx == 0)*/
+		{
+			_offset = 0;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+			if (plane_idx == 0)
+				break;
+		}
+		/*else if(plane_idx == 1)*/
+		{
+			_offset += _size;
+			_pitch = SIZE_ALIGN(width / 2, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
+			_size = SIZE_ALIGN(_pitch * (height / 2), g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+			if (plane_idx == 1)
+				break;
+		}
+		/*else if (plane_idx == 2)*/
+		{
+			_offset += _size;
+			_pitch = SIZE_ALIGN(width / 2, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
+			_size = SIZE_ALIGN(_pitch * (height / 2), g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+		}
+		break;
+	case TBM_FORMAT_YUV422:
+	case TBM_FORMAT_YVU422:
+		bpp = 16;
+		/*if(plane_idx == 0)*/
+		{
+			_offset = 0;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+			if (plane_idx == 0)
+				break;
+		}
+		/*else if(plane_idx == 1)*/
+		{
+			_offset += _size;
+			_pitch = SIZE_ALIGN(width / 2, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
+			_size = SIZE_ALIGN(_pitch * (height), g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+			if (plane_idx == 1)
+				break;
+		}
+		/*else if (plane_idx == 2)*/
+		{
+			_offset += _size;
+			_pitch = SIZE_ALIGN(width / 2, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
+			_size = SIZE_ALIGN(_pitch * (height), g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+		}
+		break;
+	case TBM_FORMAT_YUV444:
+	case TBM_FORMAT_YVU444:
+		bpp = 24;
+		/*if(plane_idx == 0)*/
+		{
+			_offset = 0;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+			if (plane_idx == 0)
+				break;
+		}
+		/*else if(plane_idx == 1)*/
+		{
+			_offset += _size;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+			if (plane_idx == 1)
+				break;
+		}
+		/*else if (plane_idx == 2)*/
+		{
+			_offset += _size;
+			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
+			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
+			_bo_idx = 0;
+		}
+		break;
+	default:
+		bpp = 0;
+		break;
+	}
 
-	if (!_bo_init_cache_state(bufmgr_exynos, bo_exynos, 1)) {
-		TBM_EXYNOS_ERROR("fail init cache state(%d)\n", bo_exynos->name);
-		free(bo_exynos);
+	*size = _size;
+	*offset = _offset;
+	*pitch = _pitch;
+	*bo_idx = _bo_idx;
+
+	return TBM_ERROR_NONE;
+}
+
+static tbm_backend_bo_data *
+tbm_exynos_bufmgr_alloc_bo(tbm_backend_bufmgr_data *bufmgr_data, int size, tbm_bo_memory_type flags, tbm_error_e *error)
+{
+	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
+	tbm_bo_exynos bo_exynos;
+	unsigned int exynos_flags;
+
+	if (bufmgr_exynos == NULL) {
+		TBM_EXYNOS_ERROR("bufmgr_data is null\n");
 		if (error)
-			*error = TBM_ERROR_OPERATION_FAILED;
+			*error = TBM_ERROR_INVALID_PARAMETER;
 		return NULL;
 	}
 
-	/* add bo_exynos to hash */
-	if (drmHashInsert(bufmgr_exynos->hashBos, bo_exynos->name, (void *)bo_exynos) < 0)
-		TBM_EXYNOS_ERROR("bo_exynos:%p Cannot insert bo_exynos to Hash(%d) from gem:%d, fd:%d\n",
-			       bo_exynos, bo_exynos->name, gem, key);
+	bo_exynos = calloc(1, sizeof(struct _tbm_bo_exynos));
+	if (!bo_exynos) {
+		TBM_EXYNOS_ERROR("fail to allocate the bo_exynos private\n");
+		if (error)
+			*error = TBM_ERROR_OUT_OF_MEMORY;
+		return NULL;
+	}
+	bo_exynos->bufmgr_exynos = bufmgr_exynos;
 
-	TBM_EXYNOS_DEBUG(" bo_exynos:%p, gem:%d(%d), fd:%d, key_fd:%d, flags:%d(%d), size:%d\n",
-	    bo_exynos,
-	    bo_exynos->gem, bo_exynos->name,
-	    bo_exynos->dmabuf,
-	    key,
-	    bo_exynos->flags_tbm, bo_exynos->flags_exynos,
-	    bo_exynos->size);
+	exynos_flags = _get_exynos_flag_from_tbm(flags);
+	if ((flags & TBM_BO_SCANOUT) &&
+	    size <= 4 * 1024) {
+		exynos_flags |= EXYNOS_BO_NONCONTIG;
+	}
 
-	if (error)
-		*error = TBM_ERROR_NONE;
+	struct drm_exynos_gem_create arg = {0, };
 
-	return (tbm_backend_bo_data *)bo_exynos;
-}
+	arg.size = (uint64_t)size;
+	arg.flags = exynos_flags;
+	if (drmCommandWriteRead(bufmgr_exynos->fd, DRM_EXYNOS_GEM_CREATE, &arg,
+				sizeof(arg))) {
+		TBM_EXYNOS_ERROR("Cannot create bo_exynos(flag:%x, size:%d)\n", arg.flags,
+			       (unsigned int)arg.size);
+		free(bo_exynos);
+		if (error)
+			*error = TBM_ERROR_OPERATION_FAILED;
+		return NULL;
+	}
 
-static tbm_key
-tbm_exynos_bo_export_key(tbm_backend_bo_data *bo_data, tbm_error_e *error)
-{
-	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+	bo_exynos->fd = bufmgr_exynos->fd;
+	bo_exynos->gem = arg.handle;
+	bo_exynos->size = size;
+	bo_exynos->flags_tbm = flags;
+	bo_exynos->flags_exynos = exynos_flags;
+	bo_exynos->name = _get_name(bo_exynos->fd, bo_exynos->gem);
 
-	if (!bo_exynos) {
+	if (!_bo_init_cache_state(bufmgr_exynos, bo_exynos, 0)) {
+		TBM_EXYNOS_ERROR("fail init cache state(%d)\n", bo_exynos->name);
+		free(bo_exynos);
 		if (error)
-			*error = TBM_ERROR_INVALID_PARAMETER;
-		return 0;
+			*error = TBM_ERROR_OPERATION_FAILED;
+		return NULL;
 	}
 
-	if (!bo_exynos->name) {
-		bo_exynos->name = _get_name(bo_exynos->fd, bo_exynos->gem);
-		if (!bo_exynos->name) {
-			TBM_EXYNOS_ERROR("error Cannot get name\n");
+	pthread_mutex_init(&bo_exynos->mutex, NULL);
+
+	if (bufmgr_exynos->use_dma_fence && !bo_exynos->dmabuf) {
+		struct drm_prime_handle arg = {0, };
+
+		arg.handle = bo_exynos->gem;
+		if (drmIoctl(bo_exynos->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg)) {
+			TBM_EXYNOS_ERROR("Cannot dmabuf=%d\n", bo_exynos->gem);
+			free(bo_exynos);
 			if (error)
-				*error = TBM_ERROR_INVALID_PARAMETER;
-			return 0;
+				*error = TBM_ERROR_OPERATION_FAILED;
+			return NULL;
 		}
+		bo_exynos->dmabuf = arg.fd;
 	}
 
-	TBM_EXYNOS_DEBUG("    bo_exynos:%p, gem:%d(%d), fd:%d, flags:%d(%d), size:%d\n",
-	    bo_exynos,
-	    bo_exynos->gem, bo_exynos->name,
-	    bo_exynos->dmabuf,
-	    bo_exynos->flags_tbm, bo_exynos->flags_exynos,
-	    bo_exynos->size);
+	/* add bo_exynos to hash */
+	if (drmHashInsert(bufmgr_exynos->hashBos, bo_exynos->name, (void *)bo_exynos) < 0)
+		TBM_EXYNOS_ERROR("Cannot insert bo_exynos to Hash(%d)\n", bo_exynos->name);
+
+	TBM_EXYNOS_DEBUG("     bo_exynos:%p, gem:%d(%d), flags:%d(%d), size:%d\n",
+		bo_exynos,
+		bo_exynos->gem, bo_exynos->name,
+		flags, exynos_flags,
+		bo_exynos->size);
 
 	if (error)
 		*error = TBM_ERROR_NONE;
 
-	return (tbm_key)bo_exynos->name;
+	return (tbm_backend_bo_data *)bo_exynos;
 }
 
-static tbm_fd
-tbm_exynos_bo_export_fd(tbm_backend_bo_data *bo_data, tbm_error_e *error)
+static tbm_backend_bo_data *
+tbm_exynos_bufmgr_import_fd(tbm_backend_bufmgr_data *bufmgr_data, tbm_fd key, tbm_error_e *error)
 {
-	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
+	tbm_bo_exynos bo_exynos;
+	unsigned int gem = 0;
+	unsigned int name;
 	int ret;
 	char buf[STRERR_BUFSIZE];
 
-	if (!bo_exynos) {
+	if (bufmgr_exynos == NULL) {
+		TBM_EXYNOS_ERROR("bufmgr_data is null\n");
 		if (error)
 			*error = TBM_ERROR_INVALID_PARAMETER;
-		return -1;
+		return NULL;
 	}
 
+	/*getting handle from fd*/
 	struct drm_prime_handle arg = {0, };
 
-	arg.handle = bo_exynos->gem;
-	ret = drmIoctl(bo_exynos->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg);
-	if (ret) {
-		TBM_EXYNOS_ERROR("bo_exynos:%p Cannot dmabuf=%d (%s)\n",
-			       bo_exynos, bo_exynos->gem, strerror_r(errno, buf, STRERR_BUFSIZE));
+	arg.fd = key;
+	arg.flags = 0;
+	if (drmIoctl(bufmgr_exynos->fd, DRM_IOCTL_PRIME_FD_TO_HANDLE, &arg)) {
+		TBM_EXYNOS_ERROR("Cannot get gem handle from fd:%d (%s)\n",
+			       arg.fd, strerror_r(errno, buf, STRERR_BUFSIZE));
 		if (error)
 			*error = TBM_ERROR_OPERATION_FAILED;
-		return (tbm_fd) ret;
+		return NULL;
 	}
+	gem = arg.handle;
 
-	TBM_EXYNOS_DEBUG(" bo_exynos:%p, gem:%d(%d), fd:%d, key_fd:%d, flags:%d(%d), size:%d\n",
-	    bo_exynos,
-	    bo_exynos->gem, bo_exynos->name,
-	    bo_exynos->dmabuf,
-	    arg.fd,
-	    bo_exynos->flags_tbm, bo_exynos->flags_exynos,
-	    bo_exynos->size);
+	name = _get_name(bufmgr_exynos->fd, gem);
+	if (!name) {
+		TBM_EXYNOS_ERROR("Cannot get name from gem:%d, fd:%d (%s)\n",
+			       gem, key, strerror_r(errno, buf, STRERR_BUFSIZE));
+		if (error)
+			*error = TBM_ERROR_OPERATION_FAILED;
+		return NULL;
+	}
 
-	if (error)
-		*error = TBM_ERROR_NONE;
+	ret = drmHashLookup(bufmgr_exynos->hashBos, name, (void **)&bo_exynos);
+	if (ret == 0) {
+		if (gem == bo_exynos->gem) {
+			if (error)
+				*error = TBM_ERROR_NONE;
+			return bo_exynos;
+		}
+	}
 
-	return (tbm_fd)arg.fd;
-}
+	/* Determine size of bo_exynos.  The fd-to-handle ioctl really should
+	 * return the size, but it doesn't.  If we have kernel 3.12 or
+	 * later, we can lseek on the prime fd to get the size.  Older
+	 * kernels will just fail, in which case we fall back to the
+	 * provided (estimated or guess size).
+	 */
+	unsigned int real_size = -1;
+	struct drm_exynos_gem_info info = {0, };
 
-static tbm_bo_handle
-tbm_exynos_bo_get_handle(tbm_backend_bo_data *bo_data, tbm_bo_device_type device, tbm_error_e *error)
-{
-	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
-	tbm_bo_handle bo_handle;
+	real_size = lseek(key, 0, SEEK_END);
+
+	info.handle = gem;
+	if (drmCommandWriteRead(bufmgr_exynos->fd,
+				DRM_EXYNOS_GEM_GET,
+				&info,
+				sizeof(struct drm_exynos_gem_info))) {
+		TBM_EXYNOS_ERROR("Cannot get gem info from gem:%d, fd:%d (%s)\n",
+			       gem, key, strerror_r(errno, buf, STRERR_BUFSIZE));
+		if (error)
+			*error = TBM_ERROR_OPERATION_FAILED;
+		return NULL;
+	}
+
+	if (real_size == -1)
+		real_size = info.size;
 
+	bo_exynos = calloc(1, sizeof(struct _tbm_bo_exynos));
 	if (!bo_exynos) {
+		TBM_EXYNOS_ERROR("bo_exynos:%p fail to allocate the bo_exynos\n", bo_exynos);
 		if (error)
-			*error = TBM_ERROR_INVALID_PARAMETER;
-		return (tbm_bo_handle) NULL;
+			*error = TBM_ERROR_OUT_OF_MEMORY;
+		return NULL;
 	}
+	bo_exynos->bufmgr_exynos = bufmgr_exynos;
 
-	if (!bo_exynos->gem) {
-		TBM_EXYNOS_ERROR("Cannot map gem=%d\n", bo_exynos->gem);
+	bo_exynos->fd = bufmgr_exynos->fd;
+	bo_exynos->gem = gem;
+	bo_exynos->size = real_size;
+	bo_exynos->flags_exynos = info.flags;
+	bo_exynos->flags_tbm = _get_tbm_flag_from_exynos(bo_exynos->flags_exynos);
+	bo_exynos->name = name;
+
+	if (!_bo_init_cache_state(bufmgr_exynos, bo_exynos, 1)) {
+		TBM_EXYNOS_ERROR("fail init cache state(%d)\n", bo_exynos->name);
+		free(bo_exynos);
 		if (error)
-			*error = TBM_ERROR_INVALID_PARAMETER;
-		return (tbm_bo_handle) NULL;
+			*error = TBM_ERROR_OPERATION_FAILED;
+		return NULL;
 	}
 
-	TBM_EXYNOS_DEBUG("bo_exynos:%p, gem:%d(%d), fd:%d, flags:%d(%d), size:%d, %s\n",
+	/* add bo_exynos to hash */
+	if (drmHashInsert(bufmgr_exynos->hashBos, bo_exynos->name, (void *)bo_exynos) < 0)
+		TBM_EXYNOS_ERROR("bo_exynos:%p Cannot insert bo_exynos to Hash(%d) from gem:%d, fd:%d\n",
+			       bo_exynos, bo_exynos->name, gem, key);
+
+	TBM_EXYNOS_DEBUG(" bo_exynos:%p, gem:%d(%d), fd:%d, key_fd:%d, flags:%d(%d), size:%d\n",
 	    bo_exynos,
 	    bo_exynos->gem, bo_exynos->name,
 	    bo_exynos->dmabuf,
+	    key,
 	    bo_exynos->flags_tbm, bo_exynos->flags_exynos,
-	    bo_exynos->size,
-	    STR_DEVICE[device]);
-
-	/*Get mapped bo_handle*/
-	bo_handle = _exynos_bo_handle(bo_exynos, device);
-	if (bo_handle.ptr == NULL) {
-		TBM_EXYNOS_ERROR("Cannot get handle: gem:%d, device:%d\n",
-			bo_exynos->gem, device);
-		if (error)
-			*error = TBM_ERROR_OPERATION_FAILED;
-		return (tbm_bo_handle) NULL;
-	}
+	    bo_exynos->size);
 
 	if (error)
 		*error = TBM_ERROR_NONE;
 
-	return bo_handle;
+	return (tbm_backend_bo_data *)bo_exynos;
 }
 
-static tbm_bo_handle
-tbm_exynos_bo_map(tbm_backend_bo_data *bo_data, tbm_bo_device_type device,
-				tbm_bo_access_option opt, tbm_error_e *error)
+static tbm_backend_bo_data *
+tbm_exynos_bufmgr_import_key(tbm_backend_bufmgr_data *bufmgr_data, tbm_key key, tbm_error_e *error)
 {
-	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
-	tbm_bo_handle bo_handle;
-	tbm_bufmgr_exynos bufmgr_exynos;
+	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
+	tbm_bo_exynos bo_exynos;
+	int ret;
 
-	if (!bo_exynos) {
+	if (bufmgr_exynos == NULL) {
+		TBM_EXYNOS_ERROR("bufmgr_data is null\n");
 		if (error)
 			*error = TBM_ERROR_INVALID_PARAMETER;
-		return (tbm_bo_handle) NULL;
+		return NULL;
 	}
 
-	bufmgr_exynos = bo_exynos->bufmgr_exynos;
-	if (!bufmgr_exynos) {
+	ret = drmHashLookup(bufmgr_exynos->hashBos, key, (void **)&bo_exynos);
+	if (ret == 0) {
 		if (error)
-			*error = TBM_ERROR_INVALID_PARAMETER;
-		return (tbm_bo_handle) NULL;
+			*error = TBM_ERROR_NONE;
+		return (tbm_backend_bo_data *)bo_exynos;
 	}
 
-	if (!bo_exynos->gem) {
-		TBM_EXYNOS_ERROR("Cannot map gem=%d\n", bo_exynos->gem);
+	struct drm_gem_open arg = {0, };
+	struct drm_exynos_gem_info info = {0, };
+
+	arg.name = key;
+	if (drmIoctl(bufmgr_exynos->fd, DRM_IOCTL_GEM_OPEN, &arg)) {
+		TBM_EXYNOS_ERROR("Cannot open gem name=%d\n", key);
 		if (error)
-			*error = TBM_ERROR_INVALID_PARAMETER;
-		return (tbm_bo_handle) NULL;
+			*error = TBM_ERROR_OPERATION_FAILED;
+		return NULL;
 	}
 
-	TBM_EXYNOS_DEBUG("       bo_exynos:%p, gem:%d(%d), fd:%d, %s, %s\n",
-	    bo_exynos,
-	    bo_exynos->gem, bo_exynos->name,
-	    bo_exynos->dmabuf,
-	    STR_DEVICE[device],
-	    STR_OPT[opt]);
+	info.handle = arg.handle;
+	if (drmCommandWriteRead(bufmgr_exynos->fd,
+				DRM_EXYNOS_GEM_GET,
+				&info,
+				sizeof(struct drm_exynos_gem_info))) {
+		TBM_EXYNOS_ERROR("Cannot get gem info=%d\n", key);
+		if (error)
+			*error = TBM_ERROR_OPERATION_FAILED;
+		return NULL;
+	}
 
-	/*Get mapped bo_handle*/
-	bo_handle = _exynos_bo_handle(bo_exynos, device);
-	if (bo_handle.ptr == NULL) {
-		TBM_EXYNOS_ERROR("Cannot get handle: gem:%d, device:%d, opt:%d\n",
-			       bo_exynos->gem, device, opt);
+	bo_exynos = calloc(1, sizeof(struct _tbm_bo_exynos));
+	if (!bo_exynos) {
+		TBM_EXYNOS_ERROR("fail to allocate the bo_exynos private\n");
+		if (error)
+			*error = TBM_ERROR_OUT_OF_MEMORY;
+		return NULL;
+	}
+	bo_exynos->bufmgr_exynos = bufmgr_exynos;
+
+	bo_exynos->fd = bufmgr_exynos->fd;
+	bo_exynos->gem = arg.handle;
+	bo_exynos->size = arg.size;
+	bo_exynos->flags_exynos = info.flags;
+	bo_exynos->name = key;
+	bo_exynos->flags_tbm = _get_tbm_flag_from_exynos(bo_exynos->flags_exynos);
+
+	if (!_bo_init_cache_state(bufmgr_exynos, bo_exynos, 1)) {
+		TBM_EXYNOS_ERROR("fail init cache state(%d)\n", bo_exynos->name);
+		free(bo_exynos);
 		if (error)
 			*error = TBM_ERROR_OPERATION_FAILED;
-		return (tbm_bo_handle) NULL;
+		return NULL;
 	}
 
-	if (bo_exynos->map_cnt == 0)
-		_bo_set_cache_state(bufmgr_exynos, bo_exynos, device, opt);
+	if (!bo_exynos->dmabuf) {
+		struct drm_prime_handle arg = {0, };
 
-	bo_exynos->last_map_device = device;
+		arg.handle = bo_exynos->gem;
+		if (drmIoctl(bo_exynos->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg)) {
+			TBM_EXYNOS_ERROR("fail to DRM_IOCTL_PRIME_HANDLE_TO_FD gem=%d\n", bo_exynos->gem);
+			if (error)
+				*error = TBM_ERROR_OPERATION_FAILED;
+			free(bo_exynos);
+			return NULL;
+		}
+		bo_exynos->dmabuf = arg.fd;
+	}
 
-	bo_exynos->map_cnt++;
+	/* add bo_exynos to hash */
+	if (drmHashInsert(bufmgr_exynos->hashBos, bo_exynos->name, (void *)bo_exynos) < 0)
+		TBM_EXYNOS_ERROR("Cannot insert bo_exynos to Hash(%d)\n", bo_exynos->name);
+
+	TBM_EXYNOS_DEBUG("    bo_exynos:%p, gem:%d(%d), fd:%d, flags:%d(%d), size:%d\n",
+	    bo_exynos,
+	    bo_exynos->gem, bo_exynos->name,
+	    bo_exynos->dmabuf,
+	    bo_exynos->flags_tbm, bo_exynos->flags_exynos,
+	    bo_exynos->size);
 
 	if (error)
 		*error = TBM_ERROR_NONE;
 
-	return bo_handle;
+	return (tbm_backend_bo_data *)bo_exynos;
 }
 
-static tbm_error_e
-tbm_exynos_bo_unmap(tbm_backend_bo_data *bo_data)
+static void
+tbm_exynos_bo_free(tbm_backend_bo_data *bo_data)
 {
 	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+	tbm_bo_exynos temp;
 	tbm_bufmgr_exynos bufmgr_exynos;
+	char buf[STRERR_BUFSIZE];
+	int ret;
 
-	if (!bo_exynos)
-		return TBM_ERROR_INVALID_PARAMETER;
+	if (!bo_data)
+		return;
 
 	bufmgr_exynos = bo_exynos->bufmgr_exynos;
 	if (!bufmgr_exynos)
-		return TBM_ERROR_INVALID_PARAMETER;
-
-	if (!bo_exynos->gem)
-		return TBM_ERROR_INVALID_PARAMETER;
-
-	bo_exynos->map_cnt--;
-
-	if (bo_exynos->map_cnt == 0)
-		_bo_save_cache_state(bufmgr_exynos, bo_exynos);
-
-    /* check whether cache control do or not */
-	if (g_enable_cache_ctrl && bo_exynos->last_map_device == TBM_DEVICE_CPU)
-		_exynos_cache_flush(bufmgr_exynos, bo_exynos, TBM_EXYNOS_CACHE_FLUSH_ALL);
-
-	bo_exynos->last_map_device = -1;
+		return;
 
-	TBM_EXYNOS_DEBUG("     bo_exynos:%p, gem:%d(%d), fd:%d\n",
+	TBM_EXYNOS_DEBUG("      bo_exynos:%p, gem:%d(%d), fd:%d, size:%d\n",
 	    bo_exynos,
 	    bo_exynos->gem, bo_exynos->name,
-	    bo_exynos->dmabuf);
+	    bo_exynos->dmabuf,
+	    bo_exynos->size);
 
-	return TBM_ERROR_NONE;
+	if (bo_exynos->pBase) {
+		if (munmap(bo_exynos->pBase, bo_exynos->size) == -1) {
+			TBM_EXYNOS_ERROR("bo_exynos:%p fail to munmap(%s)\n",
+				       bo_exynos, strerror_r(errno, buf, STRERR_BUFSIZE));
+		}
+	}
+
+	/* close dmabuf */
+	if (bo_exynos->dmabuf) {
+		close(bo_exynos->dmabuf);
+		bo_exynos->dmabuf = 0;
+	}
+
+	/* delete bo_exynos from hash */
+	ret = drmHashLookup(bufmgr_exynos->hashBos, bo_exynos->name, (void **)&temp);
+	if (ret == 0)
+		drmHashDelete(bufmgr_exynos->hashBos, bo_exynos->name);
+	else
+		TBM_EXYNOS_ERROR("Cannot find bo_exynos to Hash(%d), ret=%d\n", bo_exynos->name, ret);
+
+	if (temp != bo_exynos)
+		TBM_EXYNOS_ERROR("hashBos probably has several BOs with same name!!!\n");
+
+	_bo_destroy_cache_state(bufmgr_exynos, bo_exynos);
+
+	/* Free gem handle */
+	struct drm_gem_close arg = {0, };
+
+	memset(&arg, 0, sizeof(arg));
+	arg.handle = bo_exynos->gem;
+	if (drmIoctl(bo_exynos->fd, DRM_IOCTL_GEM_CLOSE, &arg))
+		TBM_EXYNOS_ERROR("bo_exynos:%p fail to gem close.(%s)\n",
+			       bo_exynos, strerror_r(errno, buf, STRERR_BUFSIZE));
+
+	free(bo_exynos);
 }
 
-static tbm_error_e
-tbm_exynos_bo_lock(tbm_backend_bo_data *bo_data, tbm_bo_device_type device,
-				tbm_bo_access_option opt)
+static int
+tbm_exynos_bo_get_size(tbm_backend_bo_data *bo_data, tbm_error_e *error)
 {
-#ifndef ALWAYS_BACKEND_CTRL
 	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
-	tbm_bufmgr_exynos bufmgr_exynos;
-	struct dma_buf_fence fence;
-	struct flock filelock;
-	int ret = 0;
-	char buf[STRERR_BUFSIZE];
 
-	if (!bo_exynos)
-		return TBM_ERROR_INVALID_PARAMETER;
+	if (!bo_exynos) {
+		if (error)
+			*error = TBM_ERROR_INVALID_PARAMETER;
+		return 0;
+	}
 
-	bufmgr_exynos = bo_exynos->bufmgr_exynos;
-	if (!bufmgr_exynos)
-		return TBM_ERROR_INVALID_PARAMETER;
+	if (error)
+		*error = TBM_ERROR_NONE;
 
-	if (device != TBM_DEVICE_3D && device != TBM_DEVICE_CPU) {
-		TBM_EXYNOS_DEBUG("Not support device type,\n");
-		return TBM_ERROR_OPERATION_FAILED;
+	return bo_exynos->size;
+}
+
+static tbm_bo_memory_type
+tbm_exynos_bo_get_memory_type(tbm_backend_bo_data *bo_data, tbm_error_e *error)
+{
+	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+
+	if (!bo_exynos) {
+		if (error)
+			*error = TBM_ERROR_INVALID_PARAMETER;
+		return TBM_BO_DEFAULT;
 	}
 
-	memset(&fence, 0, sizeof(struct dma_buf_fence));
+	if (error)
+		*error = TBM_ERROR_NONE;
 
-	/* Check if the given type is valid or not. */
-	if (opt & TBM_OPTION_WRITE) {
-		if (device == TBM_DEVICE_3D)
-			fence.type = DMA_BUF_ACCESS_WRITE | DMA_BUF_ACCESS_DMA;
-	} else if (opt & TBM_OPTION_READ) {
-		if (device == TBM_DEVICE_3D)
-			fence.type = DMA_BUF_ACCESS_READ | DMA_BUF_ACCESS_DMA;
-	} else {
-		TBM_EXYNOS_ERROR("Invalid argument\n");
-		return TBM_ERROR_INVALID_PARAMETER;
+	return bo_exynos->flags_tbm;
+}
+
+static tbm_bo_handle
+tbm_exynos_bo_get_handle(tbm_backend_bo_data *bo_data, tbm_bo_device_type device, tbm_error_e *error)
+{
+	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+	tbm_bo_handle bo_handle;
+
+	if (!bo_exynos) {
+		if (error)
+			*error = TBM_ERROR_INVALID_PARAMETER;
+		return (tbm_bo_handle) NULL;
 	}
 
-	/* Check if the tbm manager supports dma fence or not. */
-	if (!bufmgr_exynos->use_dma_fence) {
-		TBM_EXYNOS_ERROR("Not support DMA FENCE(%s)\n", strerror_r(errno, buf, STRERR_BUFSIZE));
-		return TBM_ERROR_OPERATION_FAILED;
+	if (!bo_exynos->gem) {
+		TBM_EXYNOS_ERROR("Cannot map gem=%d\n", bo_exynos->gem);
+		if (error)
+			*error = TBM_ERROR_INVALID_PARAMETER;
+		return (tbm_bo_handle) NULL;
+	}
 
+	TBM_EXYNOS_DEBUG("bo_exynos:%p, gem:%d(%d), fd:%d, flags:%d(%d), size:%d, %s\n",
+	    bo_exynos,
+	    bo_exynos->gem, bo_exynos->name,
+	    bo_exynos->dmabuf,
+	    bo_exynos->flags_tbm, bo_exynos->flags_exynos,
+	    bo_exynos->size,
+	    STR_DEVICE[device]);
+
+	/*Get mapped bo_handle*/
+	bo_handle = _exynos_bo_handle(bo_exynos, device);
+	if (bo_handle.ptr == NULL) {
+		TBM_EXYNOS_ERROR("Cannot get handle: gem:%d, device:%d\n",
+			bo_exynos->gem, device);
+		if (error)
+			*error = TBM_ERROR_OPERATION_FAILED;
+		return (tbm_bo_handle) NULL;
 	}
 
-	if (device == TBM_DEVICE_3D) {
-		ret = ioctl(bo_exynos->dmabuf, DMABUF_IOCTL_GET_FENCE, &fence);
-		if (ret < 0) {
-			TBM_EXYNOS_ERROR("Cannot set GET FENCE(%s)\n", strerror_r(errno, buf, STRERR_BUFSIZE));
-			return TBM_ERROR_OPERATION_FAILED;
-		}
-	} else {
-		if (opt & TBM_OPTION_WRITE)
-			filelock.l_type = F_WRLCK;
-		else
-			filelock.l_type = F_RDLCK;
+	if (error)
+		*error = TBM_ERROR_NONE;
 
-		filelock.l_whence = SEEK_CUR;
-		filelock.l_start = 0;
-		filelock.l_len = 0;
+	return bo_handle;
+}
 
-		if (-1 == fcntl(bo_exynos->dmabuf, F_SETLKW, &filelock))
-			return TBM_ERROR_OPERATION_FAILED;
+static tbm_bo_handle
+tbm_exynos_bo_map(tbm_backend_bo_data *bo_data, tbm_bo_device_type device,
+				tbm_bo_access_option opt, tbm_error_e *error)
+{
+	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+	tbm_bo_handle bo_handle;
+	tbm_bufmgr_exynos bufmgr_exynos;
+
+	if (!bo_exynos) {
+		if (error)
+			*error = TBM_ERROR_INVALID_PARAMETER;
+		return (tbm_bo_handle) NULL;
 	}
 
-	pthread_mutex_lock(&bo_exynos->mutex);
+	bufmgr_exynos = bo_exynos->bufmgr_exynos;
+	if (!bufmgr_exynos) {
+		if (error)
+			*error = TBM_ERROR_INVALID_PARAMETER;
+		return (tbm_bo_handle) NULL;
+	}
 
-	if (device == TBM_DEVICE_3D) {
-		int i;
+	if (!bo_exynos->gem) {
+		TBM_EXYNOS_ERROR("Cannot map gem=%d\n", bo_exynos->gem);
+		if (error)
+			*error = TBM_ERROR_INVALID_PARAMETER;
+		return (tbm_bo_handle) NULL;
+	}
 
-		for (i = 0; i < DMA_FENCE_LIST_MAX; i++) {
-			if (bo_exynos->dma_fence[i].ctx == 0) {
-				bo_exynos->dma_fence[i].type = fence.type;
-				bo_exynos->dma_fence[i].ctx = fence.ctx;
-				break;
-			}
-		}
+	TBM_EXYNOS_DEBUG("       bo_exynos:%p, gem:%d(%d), fd:%d, %s, %s\n",
+	    bo_exynos,
+	    bo_exynos->gem, bo_exynos->name,
+	    bo_exynos->dmabuf,
+	    STR_DEVICE[device],
+	    STR_OPT[opt]);
 
-		if (i == DMA_FENCE_LIST_MAX) {
-			/*TODO: if dma_fence list is full, it needs realloc. I will fix this. by minseok3.kim*/
-			TBM_EXYNOS_ERROR("fence list is full\n");
-		}
+	/*Get mapped bo_handle*/
+	bo_handle = _exynos_bo_handle(bo_exynos, device);
+	if (bo_handle.ptr == NULL) {
+		TBM_EXYNOS_ERROR("Cannot get handle: gem:%d, device:%d, opt:%d\n",
+			       bo_exynos->gem, device, opt);
+		if (error)
+			*error = TBM_ERROR_OPERATION_FAILED;
+		return (tbm_bo_handle) NULL;
 	}
 
-	pthread_mutex_unlock(&bo_exynos->mutex);
+	if (bo_exynos->map_cnt == 0)
+		_bo_set_cache_state(bufmgr_exynos, bo_exynos, device, opt);
 
-	TBM_EXYNOS_DEBUG("DMABUF_IOCTL_GET_FENCE! bo_exynos:%p, gem:%d(%d), fd:%ds\n",
+	bo_exynos->last_map_device = device;
+
+	bo_exynos->map_cnt++;
+
+	if (error)
+		*error = TBM_ERROR_NONE;
+
+	return bo_handle;
+}
+
+static tbm_error_e
+tbm_exynos_bo_unmap(tbm_backend_bo_data *bo_data)
+{
+	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+	tbm_bufmgr_exynos bufmgr_exynos;
+
+	if (!bo_exynos)
+		return TBM_ERROR_INVALID_PARAMETER;
+
+	bufmgr_exynos = bo_exynos->bufmgr_exynos;
+	if (!bufmgr_exynos)
+		return TBM_ERROR_INVALID_PARAMETER;
+
+	if (!bo_exynos->gem)
+		return TBM_ERROR_INVALID_PARAMETER;
+
+	bo_exynos->map_cnt--;
+
+	if (bo_exynos->map_cnt == 0)
+		_bo_save_cache_state(bufmgr_exynos, bo_exynos);
+
+    /* check whether cache control do or not */
+	if (g_enable_cache_ctrl && bo_exynos->last_map_device == TBM_DEVICE_CPU)
+		_exynos_cache_flush(bufmgr_exynos, bo_exynos, TBM_EXYNOS_CACHE_FLUSH_ALL);
+
+	bo_exynos->last_map_device = -1;
+
+	TBM_EXYNOS_DEBUG("     bo_exynos:%p, gem:%d(%d), fd:%d\n",
 	    bo_exynos,
 	    bo_exynos->gem, bo_exynos->name,
 	    bo_exynos->dmabuf);
-#endif /* ALWAYS_BACKEND_CTRL */
 
 	return TBM_ERROR_NONE;
 }
 
 static tbm_error_e
-tbm_exynos_bo_unlock(tbm_backend_bo_data *bo_data)
+tbm_exynos_bo_lock(tbm_backend_bo_data *bo_data, tbm_bo_device_type device,
+				tbm_bo_access_option opt)
 {
 #ifndef ALWAYS_BACKEND_CTRL
 	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+	tbm_bufmgr_exynos bufmgr_exynos;
 	struct dma_buf_fence fence;
 	struct flock filelock;
-	unsigned int dma_type = 0;
 	int ret = 0;
 	char buf[STRERR_BUFSIZE];
 
+	if (!bo_exynos)
+		return TBM_ERROR_INVALID_PARAMETER;
+
 	bufmgr_exynos = bo_exynos->bufmgr_exynos;
 	if (!bufmgr_exynos)
 		return TBM_ERROR_INVALID_PARAMETER;
 
-	if (bo_exynos->dma_fence[0].type & DMA_BUF_ACCESS_DMA)
-		dma_type = 1;
-
-	if (!bo_exynos->dma_fence[0].ctx && dma_type) {
-		TBM_EXYNOS_DEBUG("FENCE not support or ignored,\n");
-		return TBM_ERROR_OPERATION_FAILED;
-	}
-
-	if (!bo_exynos->dma_fence[0].ctx && dma_type) {
-		TBM_EXYNOS_DEBUG("device type is not 3D/CPU,\n");
+	if (device != TBM_DEVICE_3D && device != TBM_DEVICE_CPU) {
+		TBM_EXYNOS_DEBUG("Not support device type,\n");
 		return TBM_ERROR_OPERATION_FAILED;
 	}
 
-	pthread_mutex_lock(&bo_exynos->mutex);
-
-	if (dma_type) {
-		fence.type = bo_exynos->dma_fence[0].type;
-		fence.ctx = bo_exynos->dma_fence[0].ctx;
-		int i;
-
-		for (i = 1; i < DMA_FENCE_LIST_MAX; i++) {
-			bo_exynos->dma_fence[i - 1].type = bo_exynos->dma_fence[i].type;
-			bo_exynos->dma_fence[i - 1].ctx = bo_exynos->dma_fence[i].ctx;
-		}
-		bo_exynos->dma_fence[DMA_FENCE_LIST_MAX - 1].type = 0;
-		bo_exynos->dma_fence[DMA_FENCE_LIST_MAX - 1].ctx = 0;
-	}
-	pthread_mutex_unlock(&bo_exynos->mutex);
-
-	if (dma_type) {
-		ret = ioctl(bo_exynos->dmabuf, DMABUF_IOCTL_PUT_FENCE, &fence);
-		if (ret < 0) {
-			TBM_EXYNOS_ERROR("Can not set PUT FENCE(%s)\n", strerror_r(errno, buf, STRERR_BUFSIZE));
-			return TBM_ERROR_OPERATION_FAILED;
-		}
-	} else {
-		filelock.l_type = F_UNLCK;
-		filelock.l_whence = SEEK_CUR;
-		filelock.l_start = 0;
-		filelock.l_len = 0;
-
-		if (-1 == fcntl(bo_exynos->dmabuf, F_SETLKW, &filelock))
-			return TBM_ERROR_OPERATION_FAILED;
-	}
-
-	TBM_EXYNOS_DEBUG("DMABUF_IOCTL_PUT_FENCE! bo_exynos:%p, gem:%d(%d), fd:%ds\n",
-	    bo_exynos,
-	    bo_exynos->gem, bo_exynos->name,
-	    bo_exynos->dmabuf);
-#endif /* ALWAYS_BACKEND_CTRL */
-
-	return TBM_ERROR_NONE;
-}
-
-static void
-tbm_exynos_deinit(tbm_backend_bufmgr_data *bufmgr_data)
-{
-	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
-	tbm_bufmgr bufmgr;
-	tbm_error_e error;
-	unsigned long key;
-	void *value;
-
-	EXYNOS_RETURN_IF_FAIL(bufmgr_exynos != NULL);
-
-	bufmgr = bufmgr_exynos->bufmgr;
-
-	tbm_backend_bufmgr_free_bufmgr_func(bufmgr, bufmgr_exynos->bufmgr_func);
-	tbm_backend_bufmgr_free_bo_func(bufmgr, bufmgr_exynos->bo_func);
-
-	if (bufmgr_exynos->hashBos) {
-		while (drmHashFirst(bufmgr_exynos->hashBos, &key, &value) > 0) {
-			free(value);
-			drmHashDelete(bufmgr_exynos->hashBos, key);
-		}
-
-		drmHashDestroy(bufmgr_exynos->hashBos);
-		bufmgr_exynos->hashBos = NULL;
-	}
-
-	_bufmgr_deinit_cache_state(bufmgr_exynos);
-
-	if (bufmgr_exynos->bind_display)
-		tbm_drm_helper_wl_auth_server_deinit();
-
-	if (bufmgr_exynos->device_name)
-		free(bufmgr_exynos->device_name);
-
-	if (tbm_backend_bufmgr_query_display_server(bufmgr, &error))
-		tbm_drm_helper_unset_tbm_master_fd();
-	else
-		tbm_drm_helper_unset_fd();
-
-	close(bufmgr_exynos->fd);
-
-	free(bufmgr_exynos);
-}
-
-static tbm_error_e
-tbm_exynos_bufmgr_get_supported_formats(tbm_backend_bufmgr_data *bufmgr_data,
-							uint32_t **formats, uint32_t *num)
-{
-	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
-	uint32_t *color_formats;
-
-	EXYNOS_RETURN_VAL_IF_FAIL(bufmgr_exynos != NULL, TBM_ERROR_INVALID_PARAMETER);
-
-	color_formats = (uint32_t *)calloc(1, sizeof(uint32_t) * TBM_COLOR_FORMAT_COUNT);
-	if (color_formats == NULL)
-		return TBM_ERROR_OUT_OF_MEMORY;
-
-	memcpy(color_formats, tbm_exynos_color_format_list, sizeof(uint32_t)*TBM_COLOR_FORMAT_COUNT);
-
-	*formats = color_formats;
-	*num = TBM_COLOR_FORMAT_COUNT;
-
-	TBM_EXYNOS_DEBUG("supported format count = %d\n", *num);
-
-	return TBM_ERROR_NONE;
-}
-
-static int
-_new_calc_plane_nv12(int width, int height)
-{
-	int mbX, mbY;
-
-	mbX = DIV_ROUND_UP(width, S5P_FIMV_NUM_PIXELS_IN_MB_ROW);
-	mbY = DIV_ROUND_UP(height, S5P_FIMV_NUM_PIXELS_IN_MB_COL);
-
-	if (width * height < S5P_FIMV_MAX_FRAME_SIZE)
-		mbY = (mbY + 1) / 2 * 2;
-
-	return ((mbX * S5P_FIMV_NUM_PIXELS_IN_MB_COL) * (mbY *
-			S5P_FIMV_NUM_PIXELS_IN_MB_ROW));
-}
-
-static int
-_calc_yplane_nv12(int width, int height)
-{
-	int mbX, mbY;
-
-	mbX = SIZE_ALIGN(width + 24, S5P_FIMV_NV12MT_HALIGN);
-	mbY = SIZE_ALIGN(height + 16, S5P_FIMV_NV12MT_VALIGN);
-
-	return SIZE_ALIGN(mbX * mbY, S5P_FIMV_DEC_BUF_ALIGN);
-}
-
-static int
-_calc_uvplane_nv12(int width, int height)
-{
-	int mbX, mbY;
-
-	mbX = SIZE_ALIGN(width + 16, S5P_FIMV_NV12MT_HALIGN);
-	mbY = SIZE_ALIGN(height + 4, S5P_FIMV_NV12MT_VALIGN);
-
-	return SIZE_ALIGN((mbX * mbY) >> 1, S5P_FIMV_DEC_BUF_ALIGN);
-}
-
-static int
-_new_calc_yplane_nv12(int width, int height)
-{
-	return SIZE_ALIGN(_new_calc_plane_nv12(width,
-						height) + S5P_FIMV_D_ALIGN_PLANE_SIZE,
-			   TBM_SURFACE_ALIGNMENT_PLANE_NV12);
-}
-
-static int
-_new_calc_uvplane_nv12(int width, int height)
-{
-	return SIZE_ALIGN((_new_calc_plane_nv12(width,
-						height) >> 1) + S5P_FIMV_D_ALIGN_PLANE_SIZE,
-			  TBM_SURFACE_ALIGNMENT_PLANE_NV12);
-}
-
-static tbm_error_e
-tbm_exynos_bufmgr_get_plane_data(tbm_backend_bufmgr_data *bufmgr_data,
-							tbm_format format, int plane_idx, int width,
-							int height, uint32_t *size, uint32_t *offset,
-							uint32_t *pitch, int *bo_idx)
-{
-	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
-	int bpp;
-	int _offset = 0;
-	int _pitch = 0;
-	int _size = 0;
-	int _bo_idx = 0;
-
-	EXYNOS_RETURN_VAL_IF_FAIL(bufmgr_exynos != NULL, TBM_ERROR_INVALID_PARAMETER);
-
-	switch (format) {
-		/* 16 bpp RGB */
-	case TBM_FORMAT_XRGB4444:
-	case TBM_FORMAT_XBGR4444:
-	case TBM_FORMAT_RGBX4444:
-	case TBM_FORMAT_BGRX4444:
-	case TBM_FORMAT_ARGB4444:
-	case TBM_FORMAT_ABGR4444:
-	case TBM_FORMAT_RGBA4444:
-	case TBM_FORMAT_BGRA4444:
-	case TBM_FORMAT_XRGB1555:
-	case TBM_FORMAT_XBGR1555:
-	case TBM_FORMAT_RGBX5551:
-	case TBM_FORMAT_BGRX5551:
-	case TBM_FORMAT_ARGB1555:
-	case TBM_FORMAT_ABGR1555:
-	case TBM_FORMAT_RGBA5551:
-	case TBM_FORMAT_BGRA5551:
-	case TBM_FORMAT_RGB565:
-		bpp = 16;
-		_offset = 0;
-		_pitch = SIZE_ALIGN((width * bpp) >> 3, g_tbm_surface_alignment_pitch_rgb);
-		_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-		_bo_idx = 0;
-		break;
-		/* 24 bpp RGB */
-	case TBM_FORMAT_RGB888:
-	case TBM_FORMAT_BGR888:
-		bpp = 24;
-		_offset = 0;
-		_pitch = SIZE_ALIGN((width * bpp) >> 3, g_tbm_surface_alignment_pitch_rgb);
-		_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-		_bo_idx = 0;
-		break;
-		/* 32 bpp RGB */
-	case TBM_FORMAT_XRGB8888:
-	case TBM_FORMAT_XBGR8888:
-	case TBM_FORMAT_RGBX8888:
-	case TBM_FORMAT_BGRX8888:
-	case TBM_FORMAT_ARGB8888:
-	case TBM_FORMAT_ABGR8888:
-	case TBM_FORMAT_RGBA8888:
-	case TBM_FORMAT_BGRA8888:
-		bpp = 32;
-		_offset = 0;
-		_pitch = SIZE_ALIGN((width * bpp) >> 3, g_tbm_surface_alignment_pitch_rgb);
-		_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-		_bo_idx = 0;
-		break;
-
-		/* packed YCbCr */
-	case TBM_FORMAT_YUYV:
-	case TBM_FORMAT_YVYU:
-	case TBM_FORMAT_UYVY:
-	case TBM_FORMAT_VYUY:
-	case TBM_FORMAT_AYUV:
-		bpp = 32;
-		_offset = 0;
-		_pitch = SIZE_ALIGN((width * bpp) >> 3, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-		_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-		_bo_idx = 0;
-		break;
-
-		/*
-		* 2 plane YCbCr
-		* index 0 = Y plane, [7:0] Y
-		* index 1 = Cr:Cb plane, [15:0] Cr:Cb little endian
-		* or
-		* index 1 = Cb:Cr plane, [15:0] Cb:Cr little endian
-		*/
-	case TBM_FORMAT_NV12:
-		bpp = 12;
-		if (plane_idx == 0) {
-			_offset = 0;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-			_size = MAX(_calc_yplane_nv12(width, height), _new_calc_yplane_nv12(width,
-					height));
-			_bo_idx = 0;
-		} else if (plane_idx == 1) {
-			_offset = 0;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-			_size = MAX(_calc_uvplane_nv12(width, height), _new_calc_uvplane_nv12(width,
-					height));
-			_bo_idx = 1;
-		}
-		break;
-	case TBM_FORMAT_NV21:
-		bpp = 12;
-		if (plane_idx == 0) {
-			_offset = 0;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-		} else if (plane_idx == 1) {
-			_offset = width * height;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
-			_size = SIZE_ALIGN(_pitch * (height / 2), g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-		}
-		break;
-
-	case TBM_FORMAT_NV16:
-	case TBM_FORMAT_NV61:
-		bpp = 16;
-		/*if(plane_idx == 0)*/
-		{
-			_offset = 0;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-			if (plane_idx == 0)
-				break;
-		}
-		/*else if( plane_idx ==1 )*/
-		{
-			_offset += _size;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
-			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-		}
-		break;
-
-		/*
-		* 3 plane YCbCr
-		* index 0: Y plane, [7:0] Y
-		* index 1: Cb plane, [7:0] Cb
-		* index 2: Cr plane, [7:0] Cr
-		* or
-		* index 1: Cr plane, [7:0] Cr
-		* index 2: Cb plane, [7:0] Cb
-		*/
-
-		/*
-		* NATIVE_BUFFER_FORMAT_YV12
-		* NATIVE_BUFFER_FORMAT_I420
-		*/
-	case TBM_FORMAT_YUV410:
-	case TBM_FORMAT_YVU410:
-		bpp = 9;
-		/*if(plane_idx == 0)*/
-		{
-			_offset = 0;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-			if (plane_idx == 0)
-				break;
-		}
-		/*else if(plane_idx == 1)*/
-		{
-			_offset += _size;
-			_pitch = SIZE_ALIGN(width / 4, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 4);
-			_size = SIZE_ALIGN(_pitch * (height / 4), g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-			if (plane_idx == 1)
-				break;
-		}
-		/*else if (plane_idx == 2)*/
-		{
-			_offset += _size;
-			_pitch = SIZE_ALIGN(width / 4, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 4);
-			_size = SIZE_ALIGN(_pitch * (height / 4), g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-		}
-		break;
-	case TBM_FORMAT_YUV411:
-	case TBM_FORMAT_YVU411:
-	case TBM_FORMAT_YUV420:
-	case TBM_FORMAT_YVU420:
-		bpp = 12;
-		/*if(plane_idx == 0)*/
-		{
-			_offset = 0;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-			if (plane_idx == 0)
-				break;
-		}
-		/*else if(plane_idx == 1)*/
-		{
-			_offset += _size;
-			_pitch = SIZE_ALIGN(width / 2, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
-			_size = SIZE_ALIGN(_pitch * (height / 2), g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-			if (plane_idx == 1)
-				break;
-		}
-		/*else if (plane_idx == 2)*/
-		{
-			_offset += _size;
-			_pitch = SIZE_ALIGN(width / 2, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
-			_size = SIZE_ALIGN(_pitch * (height / 2), g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-		}
-		break;
-	case TBM_FORMAT_YUV422:
-	case TBM_FORMAT_YVU422:
-		bpp = 16;
-		/*if(plane_idx == 0)*/
-		{
-			_offset = 0;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-			if (plane_idx == 0)
-				break;
-		}
-		/*else if(plane_idx == 1)*/
-		{
-			_offset += _size;
-			_pitch = SIZE_ALIGN(width / 2, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
-			_size = SIZE_ALIGN(_pitch * (height), g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-			if (plane_idx == 1)
-				break;
-		}
-		/*else if (plane_idx == 2)*/
-		{
-			_offset += _size;
-			_pitch = SIZE_ALIGN(width / 2, TBM_SURFACE_ALIGNMENT_PITCH_YUV / 2);
-			_size = SIZE_ALIGN(_pitch * (height), g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-		}
-		break;
-	case TBM_FORMAT_YUV444:
-	case TBM_FORMAT_YVU444:
-		bpp = 24;
-		/*if(plane_idx == 0)*/
-		{
-			_offset = 0;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-			if (plane_idx == 0)
-				break;
+	memset(&fence, 0, sizeof(struct dma_buf_fence));
+
+	/* Check if the given type is valid or not. */
+	if (opt & TBM_OPTION_WRITE) {
+		if (device == TBM_DEVICE_3D)
+			fence.type = DMA_BUF_ACCESS_WRITE | DMA_BUF_ACCESS_DMA;
+	} else if (opt & TBM_OPTION_READ) {
+		if (device == TBM_DEVICE_3D)
+			fence.type = DMA_BUF_ACCESS_READ | DMA_BUF_ACCESS_DMA;
+	} else {
+		TBM_EXYNOS_ERROR("Invalid argument\n");
+		return TBM_ERROR_INVALID_PARAMETER;
+	}
+
+	/* Check if the tbm manager supports dma fence or not. */
+	if (!bufmgr_exynos->use_dma_fence) {
+		TBM_EXYNOS_ERROR("Not support DMA FENCE(%s)\n", strerror_r(errno, buf, STRERR_BUFSIZE));
+		return TBM_ERROR_OPERATION_FAILED;
+
+	}
+
+	if (device == TBM_DEVICE_3D) {
+		ret = ioctl(bo_exynos->dmabuf, DMABUF_IOCTL_GET_FENCE, &fence);
+		if (ret < 0) {
+			TBM_EXYNOS_ERROR("Cannot set GET FENCE(%s)\n", strerror_r(errno, buf, STRERR_BUFSIZE));
+			return TBM_ERROR_OPERATION_FAILED;
 		}
-		/*else if(plane_idx == 1)*/
-		{
-			_offset += _size;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
-			if (plane_idx == 1)
+	} else {
+		if (opt & TBM_OPTION_WRITE)
+			filelock.l_type = F_WRLCK;
+		else
+			filelock.l_type = F_RDLCK;
+
+		filelock.l_whence = SEEK_CUR;
+		filelock.l_start = 0;
+		filelock.l_len = 0;
+
+		if (-1 == fcntl(bo_exynos->dmabuf, F_SETLKW, &filelock))
+			return TBM_ERROR_OPERATION_FAILED;
+	}
+
+	pthread_mutex_lock(&bo_exynos->mutex);
+
+	if (device == TBM_DEVICE_3D) {
+		int i;
+
+		for (i = 0; i < DMA_FENCE_LIST_MAX; i++) {
+			if (bo_exynos->dma_fence[i].ctx == 0) {
+				bo_exynos->dma_fence[i].type = fence.type;
+				bo_exynos->dma_fence[i].ctx = fence.ctx;
 				break;
+			}
 		}
-		/*else if (plane_idx == 2)*/
-		{
-			_offset += _size;
-			_pitch = SIZE_ALIGN(width, TBM_SURFACE_ALIGNMENT_PITCH_YUV);
-			_size = SIZE_ALIGN(_pitch * height, g_tbm_surface_alignment_plane);
-			_bo_idx = 0;
+
+		if (i == DMA_FENCE_LIST_MAX) {
+			/*TODO: if dma_fence list is full, it needs realloc. I will fix this. by minseok3.kim*/
+			TBM_EXYNOS_ERROR("fence list is full\n");
 		}
-		break;
-	default:
-		bpp = 0;
-		break;
 	}
 
-	*size = _size;
-	*offset = _offset;
-	*pitch = _pitch;
-	*bo_idx = _bo_idx;
+	pthread_mutex_unlock(&bo_exynos->mutex);
+
+	TBM_EXYNOS_DEBUG("DMABUF_IOCTL_GET_FENCE! bo_exynos:%p, gem:%d(%d), fd:%ds\n",
+	    bo_exynos,
+	    bo_exynos->gem, bo_exynos->name,
+	    bo_exynos->dmabuf);
+#endif /* ALWAYS_BACKEND_CTRL */
 
 	return TBM_ERROR_NONE;
 }
 
-static tbm_bo_memory_type
-tbm_exynos_bo_get_memory_type(tbm_backend_bo_data *bo_data, tbm_error_e *error)
+static tbm_error_e
+tbm_exynos_bo_unlock(tbm_backend_bo_data *bo_data)
+{
+#ifndef ALWAYS_BACKEND_CTRL
+	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+	struct dma_buf_fence fence;
+	struct flock filelock;
+	unsigned int dma_type = 0;
+	int ret = 0;
+	char buf[STRERR_BUFSIZE];
+
+	bufmgr_exynos = bo_exynos->bufmgr_exynos;
+	if (!bufmgr_exynos)
+		return TBM_ERROR_INVALID_PARAMETER;
+
+	if (bo_exynos->dma_fence[0].type & DMA_BUF_ACCESS_DMA)
+		dma_type = 1;
+
+	if (!bo_exynos->dma_fence[0].ctx && dma_type) {
+		TBM_EXYNOS_DEBUG("FENCE not support or ignored,\n");
+		return TBM_ERROR_OPERATION_FAILED;
+	}
+
+	if (!bo_exynos->dma_fence[0].ctx && dma_type) {
+		TBM_EXYNOS_DEBUG("device type is not 3D/CPU,\n");
+		return TBM_ERROR_OPERATION_FAILED;
+	}
+
+	pthread_mutex_lock(&bo_exynos->mutex);
+
+	if (dma_type) {
+		fence.type = bo_exynos->dma_fence[0].type;
+		fence.ctx = bo_exynos->dma_fence[0].ctx;
+		int i;
+
+		for (i = 1; i < DMA_FENCE_LIST_MAX; i++) {
+			bo_exynos->dma_fence[i - 1].type = bo_exynos->dma_fence[i].type;
+			bo_exynos->dma_fence[i - 1].ctx = bo_exynos->dma_fence[i].ctx;
+		}
+		bo_exynos->dma_fence[DMA_FENCE_LIST_MAX - 1].type = 0;
+		bo_exynos->dma_fence[DMA_FENCE_LIST_MAX - 1].ctx = 0;
+	}
+	pthread_mutex_unlock(&bo_exynos->mutex);
+
+	if (dma_type) {
+		ret = ioctl(bo_exynos->dmabuf, DMABUF_IOCTL_PUT_FENCE, &fence);
+		if (ret < 0) {
+			TBM_EXYNOS_ERROR("Can not set PUT FENCE(%s)\n", strerror_r(errno, buf, STRERR_BUFSIZE));
+			return TBM_ERROR_OPERATION_FAILED;
+		}
+	} else {
+		filelock.l_type = F_UNLCK;
+		filelock.l_whence = SEEK_CUR;
+		filelock.l_start = 0;
+		filelock.l_len = 0;
+
+		if (-1 == fcntl(bo_exynos->dmabuf, F_SETLKW, &filelock))
+			return TBM_ERROR_OPERATION_FAILED;
+	}
+
+	TBM_EXYNOS_DEBUG("DMABUF_IOCTL_PUT_FENCE! bo_exynos:%p, gem:%d(%d), fd:%ds\n",
+	    bo_exynos,
+	    bo_exynos->gem, bo_exynos->name,
+	    bo_exynos->dmabuf);
+#endif /* ALWAYS_BACKEND_CTRL */
+
+	return TBM_ERROR_NONE;
+}
+static tbm_fd
+tbm_exynos_bo_export_fd(tbm_backend_bo_data *bo_data, tbm_error_e *error)
 {
 	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
+	int ret;
+	char buf[STRERR_BUFSIZE];
 
 	if (!bo_exynos) {
 		if (error)
 			*error = TBM_ERROR_INVALID_PARAMETER;
-		return TBM_BO_DEFAULT;
+		return -1;
+	}
+
+	struct drm_prime_handle arg = {0, };
+
+	arg.handle = bo_exynos->gem;
+	ret = drmIoctl(bo_exynos->fd, DRM_IOCTL_PRIME_HANDLE_TO_FD, &arg);
+	if (ret) {
+		TBM_EXYNOS_ERROR("bo_exynos:%p Cannot dmabuf=%d (%s)\n",
+			       bo_exynos, bo_exynos->gem, strerror_r(errno, buf, STRERR_BUFSIZE));
+		if (error)
+			*error = TBM_ERROR_OPERATION_FAILED;
+		return (tbm_fd) ret;
 	}
 
+	TBM_EXYNOS_DEBUG(" bo_exynos:%p, gem:%d(%d), fd:%d, key_fd:%d, flags:%d(%d), size:%d\n",
+	    bo_exynos,
+	    bo_exynos->gem, bo_exynos->name,
+	    bo_exynos->dmabuf,
+	    arg.fd,
+	    bo_exynos->flags_tbm, bo_exynos->flags_exynos,
+	    bo_exynos->size);
+
 	if (error)
 		*error = TBM_ERROR_NONE;
 
-	return bo_exynos->flags_tbm;
+	return (tbm_fd)arg.fd;
 }
 
-static tbm_bufmgr_capability
-tbm_exynos_bufmgr_get_capabilities(tbm_backend_bufmgr_data *bufmgr_data, tbm_error_e *error)
+static tbm_key
+tbm_exynos_bo_export_key(tbm_backend_bo_data *bo_data, tbm_error_e *error)
 {
-	tbm_bufmgr_capability capabilities = TBM_BUFMGR_CAPABILITY_NONE;
+	tbm_bo_exynos bo_exynos = (tbm_bo_exynos)bo_data;
 
-	capabilities = TBM_BUFMGR_CAPABILITY_SHARE_KEY|TBM_BUFMGR_CAPABILITY_SHARE_FD;
+	if (!bo_exynos) {
+		if (error)
+			*error = TBM_ERROR_INVALID_PARAMETER;
+		return 0;
+	}
+
+	if (!bo_exynos->name) {
+		bo_exynos->name = _get_name(bo_exynos->fd, bo_exynos->gem);
+		if (!bo_exynos->name) {
+			TBM_EXYNOS_ERROR("error Cannot get name\n");
+			if (error)
+				*error = TBM_ERROR_INVALID_PARAMETER;
+			return 0;
+		}
+	}
+
+	TBM_EXYNOS_DEBUG("    bo_exynos:%p, gem:%d(%d), fd:%d, flags:%d(%d), size:%d\n",
+	    bo_exynos,
+	    bo_exynos->gem, bo_exynos->name,
+	    bo_exynos->dmabuf,
+	    bo_exynos->flags_tbm, bo_exynos->flags_exynos,
+	    bo_exynos->size);
 
 	if (error)
 		*error = TBM_ERROR_NONE;
 
-	return capabilities;
+	return (tbm_key)bo_exynos->name;
 }
 
-static tbm_error_e
-tbm_exynos_bufmgr_bind_native_display(tbm_backend_bufmgr_data *bufmgr_data, tbm_native_display *native_display)
+static void
+tbm_exynos_deinit(tbm_backend_bufmgr_data *bufmgr_data)
 {
 	tbm_bufmgr_exynos bufmgr_exynos = (tbm_bufmgr_exynos)bufmgr_data;
-	EXYNOS_RETURN_VAL_IF_FAIL(bufmgr_exynos != NULL, TBM_ERROR_INVALID_PARAMETER);
+	tbm_bufmgr bufmgr;
+	tbm_error_e error;
+	unsigned long key;
+	void *value;
 
-	if (!tbm_drm_helper_wl_auth_server_init(native_display, bufmgr_exynos->fd,
-					   bufmgr_exynos->device_name, 0)) {
-		TBM_EXYNOS_ERROR("fail to tbm_drm_helper_wl_server_init\n");
-		return TBM_ERROR_OPERATION_FAILED;
+	EXYNOS_RETURN_IF_FAIL(bufmgr_exynos != NULL);
+
+	bufmgr = bufmgr_exynos->bufmgr;
+
+	tbm_backend_bufmgr_free_bufmgr_func(bufmgr, bufmgr_exynos->bufmgr_func);
+	tbm_backend_bufmgr_free_bo_func(bufmgr, bufmgr_exynos->bo_func);
+
+	if (bufmgr_exynos->hashBos) {
+		while (drmHashFirst(bufmgr_exynos->hashBos, &key, &value) > 0) {
+			free(value);
+			drmHashDelete(bufmgr_exynos->hashBos, key);
+		}
+
+		drmHashDestroy(bufmgr_exynos->hashBos);
+		bufmgr_exynos->hashBos = NULL;
 	}
 
-	bufmgr_exynos->bind_display = native_display;
+	_bufmgr_deinit_cache_state(bufmgr_exynos);
 
-	return TBM_ERROR_NONE;
+	if (bufmgr_exynos->bind_display)
+		tbm_drm_helper_wl_auth_server_deinit();
+
+	if (bufmgr_exynos->device_name)
+		free(bufmgr_exynos->device_name);
+
+	if (tbm_backend_bufmgr_query_display_server(bufmgr, &error))
+		tbm_drm_helper_unset_tbm_master_fd();
+	else
+		tbm_drm_helper_unset_fd();
+
+	close(bufmgr_exynos->fd);
+
+	free(bufmgr_exynos);
 }
 
 static tbm_backend_bufmgr_data *