From: Linus Torvalds Date: Mon, 1 Nov 2021 22:12:04 +0000 (-0700) Subject: Merge tag 'ras_core_for_v5.16_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git... X-Git-Tag: v6.1-rc5~2800 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=158405e888133f89dc9ec3e179c33544acdcf22a;p=platform%2Fkernel%2Flinux-starfive.git Merge tag 'ras_core_for_v5.16_rc1' of git://git./linux/kernel/git/tip/tip Pull RAS updates from Borislav Petkov: - Get rid of a bunch of function pointers used in MCA land in favor of normal functions. This is in preparation of making the MCA code noinstr-aware - When the kernel copies data from user addresses and it encounters a machine check, a SIGBUS is sent to that process. Change this action to either an -EFAULT which is returned to the user or a short write, making the recovery action a lot more user-friendly * tag 'ras_core_for_v5.16_rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mce: Sort mca_config members to get rid of unnecessary padding x86/mce: Get rid of the ->quirk_no_way_out() indirect call x86/mce: Get rid of msr_ops x86/mce: Get rid of machine_check_vector x86/mce: Get rid of the mce_severity function pointer x86/mce: Drop copyin special case for #MC x86/mce: Change to not send SIGBUS error during copy from user --- 158405e888133f89dc9ec3e179c33544acdcf22a diff --cc arch/x86/kernel/cpu/mce/internal.h index 3463f8c,37b9e38..acd61c4 --- a/arch/x86/kernel/cpu/mce/internal.h +++ b/arch/x86/kernel/cpu/mce/internal.h @@@ -183,7 -190,31 +190,21 @@@ extern bool filter_mce(struct mce *m) #ifdef CONFIG_X86_MCE_AMD extern bool amd_filter_mce(struct mce *m); #else -static inline bool amd_filter_mce(struct mce *m) { return false; }; +static inline bool amd_filter_mce(struct mce *m) { return false; } #endif -__visible bool ex_handler_rdmsr_fault(const struct exception_table_entry *fixup, - struct pt_regs *regs, int trapnr, - unsigned long error_code, - unsigned long fault_addr); - -__visible bool ex_handler_wrmsr_fault(const struct exception_table_entry *fixup, - struct pt_regs *regs, int trapnr, - unsigned long error_code, - unsigned long fault_addr); - + #ifdef CONFIG_X86_ANCIENT_MCE + void intel_p5_mcheck_init(struct cpuinfo_x86 *c); + void winchip_mcheck_init(struct cpuinfo_x86 *c); + noinstr void pentium_machine_check(struct pt_regs *regs); + noinstr void winchip_machine_check(struct pt_regs *regs); + static inline void enable_p5_mce(void) { mce_p5_enabled = 1; } + #else + static inline void intel_p5_mcheck_init(struct cpuinfo_x86 *c) {} + static inline void winchip_mcheck_init(struct cpuinfo_x86 *c) {} + static inline void enable_p5_mce(void) {} + static inline void pentium_machine_check(struct pt_regs *regs) {} + static inline void winchip_machine_check(struct pt_regs *regs) {} + #endif + #endif /* __X86_MCE_INTERNAL_H__ */