From: Nick Clifton <nickc@redhat.com>
Date: Mon, 28 Nov 2016 17:51:57 +0000 (+0000)
Subject: Update linker tests after partial reversion of PR 20815 patch.
X-Git-Tag: users/ARM/embedded-binutils-master-2016q4~82
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=157686a88644b111658c661fc225881e75f3b0db;p=external%2Fbinutils.git

Update linker tests after partial reversion of PR 20815 patch.

	PR 20815
	* testsuite/ld-elf/loadaddr1.d: Update.
	* testsuite/ld-powerpc/vle-multiseg-5.d: Update.
	* testsuite/ld-scripts/phdrs3a.d: Update.
---

diff --git a/ld/ChangeLog b/ld/ChangeLog
index 8040aa0..f291257 100644
--- a/ld/ChangeLog
+++ b/ld/ChangeLog
@@ -1,3 +1,10 @@
+2016-11-28  Nick Clifton  <nickc@redhat.com>
+
+	PR 20815
+	* testsuite/ld-elf/loadaddr1.d: Update.
+	* testsuite/ld-powerpc/vle-multiseg-5.d: Update.
+	* testsuite/ld-scripts/phdrs3a.d: Update.
+
 2016-11-28  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* testsuite/ld-elf/indirect.exp: Add a test for PR 18720.
diff --git a/ld/testsuite/ld-elf/loadaddr1.d b/ld/testsuite/ld-elf/loadaddr1.d
index 0aa372c..0fd96a7 100644
--- a/ld/testsuite/ld-elf/loadaddr1.d
+++ b/ld/testsuite/ld-elf/loadaddr1.d
@@ -5,6 +5,6 @@
 
 #...
   LOAD +0x000000 0xf*80000000 0xf*80000000 0x100050 0x100050 RWE 0x200000
-  LOAD +0x302000 0xf*80102000 0xf*80102000 0x0*10 0x0*10 RW  0x200000
   LOAD +0x200000 0xf*ff600000 0xf*80101000 0x0*10 0x0*10 R E 0x200000
+  LOAD +0x302000 0xf*80102000 0xf*80102000 0x0*10 0x0*10 RW  0x200000
 #pass
diff --git a/ld/testsuite/ld-powerpc/vle-multiseg-5.d b/ld/testsuite/ld-powerpc/vle-multiseg-5.d
index 97de87d..c223876 100644
--- a/ld/testsuite/ld-powerpc/vle-multiseg-5.d
+++ b/ld/testsuite/ld-powerpc/vle-multiseg-5.d
@@ -6,11 +6,11 @@ There are 3 program headers, starting at offset [0-9]+
 Program Headers:
   Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
   LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
-  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
   LOAD ( +0x[0-9a-f]+){5} RW  0x[0-9a-f]+
+  LOAD ( +0x[0-9a-f]+){5} R E 0x[0-9a-f]+
 
  Section to Segment mapping:
   Segment Sections...
    00     .text_vle .text_iv 
-   01     .iv_handlers 
-   02     .data 
+   01     .data 
+   02     .iv_handlers 
diff --git a/ld/testsuite/ld-scripts/phdrs3a.d b/ld/testsuite/ld-scripts/phdrs3a.d
index d96bd13..80bde71 100644
--- a/ld/testsuite/ld-scripts/phdrs3a.d
+++ b/ld/testsuite/ld-scripts/phdrs3a.d
@@ -4,6 +4,6 @@
 #readelf: -l --wide
 
 #...
-[ \t]+LOAD[ x0-9a-f]+ E [ x0-9a-f]+
 [ \t]+LOAD[ x0-9a-f]+ R [ x0-9a-f]+
+[ \t]+LOAD[ x0-9a-f]+ E [ x0-9a-f]+
 #pass