From: Michal Wajdeczko <Michal.Wajdeczko@intel.com>
Date: Wed, 26 Mar 2008 19:51:20 +0000 (-0700)
Subject: [965] Correctly set read mask for OPCODE_SWZ in pass1.
X-Git-Tag: 062012170305~18817
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=13a6f73a64e23bad71d5e94d446e133b3cf634f7;p=profile%2Fivi%2Fmesa.git

[965] Correctly set read mask for OPCODE_SWZ in pass1.

While OPCODE_SWZ has usually been optimized away in pass0, it may still
exist if a SWZ with dst saturate was emitted in pass_fp.  Fixes an error
in oglconform fpalu.c.
---

diff --git a/src/mesa/drivers/dri/i965/brw_wm_pass1.c b/src/mesa/drivers/dri/i965/brw_wm_pass1.c
index 26c044d..f6f3a38 100644
--- a/src/mesa/drivers/dri/i965/brw_wm_pass1.c
+++ b/src/mesa/drivers/dri/i965/brw_wm_pass1.c
@@ -150,6 +150,7 @@ void brw_wm_pass1( struct brw_wm_compile *c )
       case OPCODE_FLR:
       case OPCODE_FRC:
       case OPCODE_MOV:
+      case OPCODE_SWZ:
 	 read0 = writemask;
 	 break;
 
@@ -257,7 +258,6 @@ void brw_wm_pass1( struct brw_wm_compile *c )
 	 read0 = WRITEMASK_XYW;
 	 break;
 
-      case OPCODE_SWZ:
       case OPCODE_DST:
       case OPCODE_TXP:
       default: