From: Ville Syrjälä Date: Fri, 1 Apr 2016 18:53:18 +0000 (+0300) Subject: drm/i915: Make sure LP1+ watermarks levels are preserved when going from 1 to 2 pipes X-Git-Tag: v4.7-rc1~29^2^2~141 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=1204d5baa8781a1bf968244bd2b0f15ed861e573;p=platform%2Fkernel%2Flinux-exynos.git drm/i915: Make sure LP1+ watermarks levels are preserved when going from 1 to 2 pipes Once again ILK is unhappy if we clear out the LP1+ watermark levels outright, and instead we must disable the levels we don't want while still leaving the actual programmed watermark levels intact. Fixes underruns on the already enabled pipe when programming watermarks while enabling the second pipe. Cc: Daniel Vetter Cc: Matt Roper Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=93787 Signed-off-by: Ville Syrjälä Link: http://patchwork.freedesktop.org/patch/msgid/1459536799-18109-3-git-send-email-ville.syrjala@linux.intel.com Reviewed-by: Patrik Jakobsson --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 43b24a1..f678276 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -2483,7 +2483,7 @@ static void ilk_wm_merge(struct drm_device *dev, /* ILK/SNB/IVB: LP1+ watermarks only w/ single pipe */ if ((INTEL_INFO(dev)->gen <= 6 || IS_IVYBRIDGE(dev)) && config->num_pipes_active > 1) - return; + last_enabled_level = 0; /* ILK: FBC WM must be disabled always */ merged->fbc_wm_enabled = INTEL_INFO(dev)->gen >= 6;