From: Richard Boulton Date: Sat, 16 Sep 2000 00:59:12 +0000 (+0000) Subject: More work towards a powerPC port, and towards generic portability. X-Git-Tag: RELEASE-0_1_0-SLIPSTREAM~320 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=11e8ef9074d749e999066b6457c6c6ae75f01a03;p=platform%2Fupstream%2Fgstreamer.git More work towards a powerPC port, and towards generic portability. Original commit message from CVS: More work towards a powerPC port, and towards generic portability. --- diff --git a/gst/Makefile.am b/gst/Makefile.am index f10fbe8..e2e8d4b 100644 --- a/gst/Makefile.am +++ b/gst/Makefile.am @@ -12,7 +12,7 @@ if HAVE_CPU_I386 GSTARCH_SRCS = gstcpuid_i386.s else if HAVE_CPU_PPC -GSTARCH_SRCS = gstppc.c +GSTARCH_SRCS = else GSTARCH_SRCS = endif @@ -55,6 +55,9 @@ libgstinclude_HEADERS = \ gstbufferpool.h \ gstclock.h \ gstcpu.h \ + gstarch.h \ + gsti386.h \ + gstppc.h \ gstelement.h \ gstbin.h \ gstpipeline.h \ diff --git a/gst/gstarch.h b/gst/gstarch.h index 14dc1b5..0643c72 100644 --- a/gst/gstarch.h +++ b/gst/gstarch.h @@ -9,7 +9,7 @@ #ifdef HAVE_CPU_PPC #include "gstppc.h" #else -#warn Need to know about this architecture, or have a generic implementation +#error Need to know about this architecture, or have a generic implementation #endif #endif diff --git a/gst/gstcpu.c b/gst/gstcpu.c index 38605f5..57d2f07 100644 --- a/gst/gstcpu.c +++ b/gst/gstcpu.c @@ -28,7 +28,7 @@ void gst_cpuid_i386(int,long *,long *,long *,long *); #define gst_cpuid gst_cpuid_i386 #else -#define gst_cpuid(o,a,b,c,d) +#define gst_cpuid(o,a,b,c,d) (void)(a);(void)(b);(void)(c); #endif void _gst_cpu_initialize(void) diff --git a/gst/gstppc.h b/gst/gstppc.h index 1e77389..be633df 100644 --- a/gst/gstppc.h +++ b/gst/gstppc.h @@ -1,18 +1,13 @@ #ifndef GST_HGUARD_GSTPPC_H #define GST_HGUARD_GSTPPC_H -/* Hmm - does this work, or do the braces cause other stack manipulation? - * XXX +/* FIXME: Hmm - does this work? */ -#define GET_SP(target) { \ - register unsigned long r1 __asm__("r1"); \ - target = r1; \ -} +#define GET_SP(target) \ + __asm__("stw 1,%0" : "=m"(target) : : "r1"); -#define SET_SP(source) { \ - register unsigned long r1 __asm__("r1"); \ - r1 = source; \ -} +#define SET_SP(source) \ + __asm__("lwz 1,%0" : "=m"(source)) #define JUMP(target) \ __asm__("b " SYMBOL_NAME_STR(cothread_stub)) diff --git a/libs/getbits/Makefile.am b/libs/getbits/Makefile.am index cc5c1e0..0c798db 100644 --- a/libs/getbits/Makefile.am +++ b/libs/getbits/Makefile.am @@ -5,14 +5,11 @@ filter_LTLIBRARIES = libgstgetbits.la if HAVE_CPU_I386 GSTARCH_SRCS = gstgetbits_i386.s else -if HAVE_CPU_PPC GSTARCH_SRCS = gstgetbits_generic.c -else -GSTARCH_SRCS = -endif endif libgstgetbits_la_SOURCES = gstgetbits.c gstgetbits_inl.h $(GSTARCH_SRCS) +EXTRA_libgstgetbits_la_SOURCES = gstgetbits_i386.s gstgetbits_generic.c libgstgetbitsincludedir = $(includedir)/gst/libs/gstgetbits libgstgetbitsinclude_HEADERS = gstgetbits.h diff --git a/libs/getbits/gstgetbits_generic.c b/libs/getbits/gstgetbits_generic.c new file mode 100644 index 0000000..dc5e810 --- /dev/null +++ b/libs/getbits/gstgetbits_generic.c @@ -0,0 +1,2 @@ + +#error Need an implementation of the functions in gstgetbits_i386.s