From: Simon Hausmann Date: Fri, 5 Jul 2013 08:44:55 +0000 (+0200) Subject: Follow-up to previous commit about forcing thumb builds: X-Git-Tag: upstream/5.2.1~669^2~76 X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=10be273b3c804d86ee6dde5f550fd76217a8a77d;p=platform%2Fupstream%2Fqtdeclarative.git Follow-up to previous commit about forcing thumb builds: Disable the checks of the thumb bit in code pointers when building for Android, because we want to allow for intermixing of thumb (what the JIT generates) and arm code (what the compiler generates for run-time functions we call, in debug builds) Change-Id: I0bcce4015d18db4e38244a1d1ad89413b3f17152 Reviewed-by: Lars Knoll --- diff --git a/src/3rdparty/masm/assembler/ARMv7Assembler.h b/src/3rdparty/masm/assembler/ARMv7Assembler.h index 99a0e82..3a0a435 100644 --- a/src/3rdparty/masm/assembler/ARMv7Assembler.h +++ b/src/3rdparty/masm/assembler/ARMv7Assembler.h @@ -30,6 +30,7 @@ #if ENABLE(ASSEMBLER) && CPU(ARM_THUMB2) #include "AssemblerBuffer.h" +#include "MacroAssemblerCodeRef.h" #include #include #include @@ -2111,7 +2112,7 @@ public: { ASSERT(!(reinterpret_cast(code) & 1)); ASSERT(from.isSet()); - ASSERT(reinterpret_cast(to) & 1); + ASSERT_VALID_CODE_POINTER(to); setPointer(reinterpret_cast(reinterpret_cast(code) + from.m_offset) - 1, to, false); } diff --git a/src/3rdparty/masm/assembler/MacroAssemblerCodeRef.h b/src/3rdparty/masm/assembler/MacroAssemblerCodeRef.h index 89cffb1..b699316 100644 --- a/src/3rdparty/masm/assembler/MacroAssemblerCodeRef.h +++ b/src/3rdparty/masm/assembler/MacroAssemblerCodeRef.h @@ -33,10 +33,12 @@ #include #include #include +#include // ASSERT_VALID_CODE_POINTER checks that ptr is a non-null pointer, and that it is a valid // instruction address on the platform (for example, check any alignment requirements). -#if CPU(ARM_THUMB2) +// (Disabled checks on Android/ARM because we want to intermix thumb and arm) +#if CPU(ARM_THUMB2) && !defined(Q_OS_ANDROID) // ARM/thumb instructions must be 16-bit aligned, but all code pointers to be loaded // into the processor are decorated with the bottom bit set, indicating that this is // thumb code (as oposed to 32-bit traditional ARM). The first test checks for both