From: Artyom Tarasenko <atar4qemu@googlemail.com>
Date: Sat, 16 Jan 2010 09:06:32 +0000 (+0000)
Subject: sparc32 do not clear interrupts when masking
X-Git-Tag: TizenStudio_2.0_p2.3.2~208^2~9028
X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=10760f0fa7c089e45d629d9ad2803c91f2bcb90f;p=sdk%2Femulator%2Fqemu.git

sparc32 do not clear interrupts when masking

Don't clear interrupts on disabling, because
* Sun4M_SystemArchitecture_edited2.pdf doesn't describe
  that masking or un-masking IRQ shall clear pending ones.

* Field tests also show that SPARCstation-20 doesn't
  clear them.

* The patch makes Solaris 2.5.1/2.6 boot ~1500 times
  faster (~20 seconds instead of ~8 hours)

Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
---

diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c
index 9aff892..b76d3ac 100644
--- a/hw/slavio_intctl.c
+++ b/hw/slavio_intctl.c
@@ -185,11 +185,10 @@ static void slavio_intctlm_mem_writel(void *opaque, target_phys_addr_t addr,
                 s->intregm_disabled);
         slavio_check_interrupts(s, 1);
         break;
-    case 3: // set (disable, clear pending)
+    case 3: // set (disable; doesn't affect pending)
         // Force clear unused bits
         val &= MASTER_IRQ_MASK;
         s->intregm_disabled |= val;
-        s->intregm_pending &= ~val;
         slavio_check_interrupts(s, 1);
         DPRINTF("Disabled master irq mask %x, curmask %x\n", val,
                 s->intregm_disabled);