From: Adhemerval Zanella Date: Fri, 26 Oct 2012 12:09:58 +0000 (+0000) Subject: PowerPC: Fix for rldcl/rldicl/rldicr MC emission X-Git-Url: http://review.tizen.org/git/?a=commitdiff_plain;h=0f9cff1ab880893819fbdd5f80243d950ee92644;p=platform%2Fupstream%2Fllvm.git PowerPC: Fix for rldcl/rldicl/rldicr MC emission This patch fixes the rldcl/rldicl/rldicr instruction emission. The issue is the MDForm_1 instruction defines the PowerISA MB field from 'rldicl' with the name MBE, but RLDCL/RLDICL/RLDICR definition uses as 'MB'. It end up by generatint the 'rldicl' enconding at 'lib/Target/PowerPC/PPCGenMCCodeEmitter.inc' to use the fourth argument as the third. The patch changes it by adjusting to use the fourth argument as intended. Fixes PR14180. llvm-svn: 166770 --- diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td index 5a78e8a..6c2249a 100644 --- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td +++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td @@ -494,16 +494,16 @@ def RLDIMI : MDForm_1<30, 3, // Rotate instructions. def RLDCL : MDForm_1<30, 0, - (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB, u6imm:$MB), - "rldcl $rA, $rS, $rB, $MB", IntRotateD, + (outs G8RC:$rA), (ins G8RC:$rS, GPRC:$rB, u6imm:$MBE), + "rldcl $rA, $rS, $rB, $MBE", IntRotateD, []>, isPPC64; def RLDICL : MDForm_1<30, 0, - (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MB), - "rldicl $rA, $rS, $SH, $MB", IntRotateDI, + (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MBE), + "rldicl $rA, $rS, $SH, $MBE", IntRotateDI, []>, isPPC64; def RLDICR : MDForm_1<30, 1, - (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$ME), - "rldicr $rA, $rS, $SH, $ME", IntRotateDI, + (outs G8RC:$rA), (ins G8RC:$rS, u6imm:$SH, u6imm:$MBE), + "rldicr $rA, $rS, $SH, $MBE", IntRotateDI, []>, isPPC64; def RLWINM8 : MForm_2<21,